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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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![Linus Torvalds](/assets/img/avatar_default.png)
Plenty of acronym soup here: - Initial support for the Scalable Vector Extension (SVE) - Improved handling for SError interrupts (required to handle RAS events) - Enable GCC support for 128-bit integer types - Remove kernel text addresses from backtraces and register dumps - Use of WFE to implement long delay()s - ACPI IORT updates from Lorenzo Pieralisi - Perf PMU driver for the Statistical Profiling Extension (SPE) - Perf PMU driver for Hisilicon's system PMUs - Misc cleanups and non-critical fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJaCcLqAAoJELescNyEwWM0JREH/2FbmD/khGzEtP8LW+o9D8iV TBM02uWQxS1bbO1pV2vb+512YQO+iWfeQwJH9Jv2FZcrMvFv7uGRnYgAnJuXNGrl W+LL6OhN22A24LSawC437RU3Xe7GqrtONIY/yLeJBPablfcDGzPK1eHRA0pUzcyX VlyDruSHWX44VGBPV6JRd3x0vxpV8syeKOjbRvopRfn3Nwkbd76V3YSfEgwoTG5W ET1sOnXLmHHdeifn/l1Am5FX1FYstpcd7usUTJ4Oto8y7e09tw3bGJCD0aMJ3vow v1pCUWohEw7fHqoPc9rTrc1QEnkdML4vjJvMPUzwyTfPrN+7uEuMIEeJierW+qE= =0qrg -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "The big highlight is support for the Scalable Vector Extension (SVE) which required extensive ABI work to ensure we don't break existing applications by blowing away their signal stack with the rather large new vector context (<= 2 kbit per vector register). There's further work to be done optimising things like exception return, but the ABI is solid now. Much of the line count comes from some new PMU drivers we have, but they're pretty self-contained and I suspect we'll have more of them in future. Plenty of acronym soup here: - initial support for the Scalable Vector Extension (SVE) - improved handling for SError interrupts (required to handle RAS events) - enable GCC support for 128-bit integer types - remove kernel text addresses from backtraces and register dumps - use of WFE to implement long delay()s - ACPI IORT updates from Lorenzo Pieralisi - perf PMU driver for the Statistical Profiling Extension (SPE) - perf PMU driver for Hisilicon's system PMUs - misc cleanups and non-critical fixes" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (97 commits) arm64: Make ARMV8_DEPRECATED depend on SYSCTL arm64: Implement __lshrti3 library function arm64: support __int128 on gcc 5+ arm64/sve: Add documentation arm64/sve: Detect SVE and activate runtime support arm64/sve: KVM: Hide SVE from CPU features exposed to guests arm64/sve: KVM: Treat guest SVE use as undefined instruction execution arm64/sve: KVM: Prevent guests from using SVE arm64/sve: Add sysctl to set the default vector length for new processes arm64/sve: Add prctl controls for userspace vector length management arm64/sve: ptrace and ELF coredump support arm64/sve: Preserve SVE registers around EFI runtime service calls arm64/sve: Preserve SVE registers around kernel-mode NEON use arm64/sve: Probe SVE capabilities and usable vector lengths arm64: cpufeature: Move sys_caps_initialised declarations arm64/sve: Backend logic for setting the vector length arm64/sve: Signal handling support arm64/sve: Support vector length resetting for new processes arm64/sve: Core task context handling arm64/sve: Low-level CPU setup ...
235 lines
5.3 KiB
C
235 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* platform_device probing code for ARM performance counters.
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*
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* Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
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* Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
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*/
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#define pr_fmt(fmt) "hw perfevents: " fmt
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#include <linux/bug.h>
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#include <linux/cpumask.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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#include <linux/kconfig.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/percpu.h>
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#include <linux/perf/arm_pmu.h>
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#include <linux/platform_device.h>
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#include <linux/printk.h>
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#include <linux/smp.h>
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static int probe_current_pmu(struct arm_pmu *pmu,
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const struct pmu_probe_info *info)
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{
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int cpu = get_cpu();
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unsigned int cpuid = read_cpuid_id();
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int ret = -ENODEV;
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pr_info("probing PMU on CPU %d\n", cpu);
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for (; info->init != NULL; info++) {
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if ((cpuid & info->mask) != info->cpuid)
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continue;
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ret = info->init(pmu);
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break;
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}
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put_cpu();
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return ret;
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}
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static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
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{
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int cpu, ret;
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struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
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ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
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if (ret)
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return ret;
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for_each_cpu(cpu, &pmu->supported_cpus)
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per_cpu(hw_events->irq, cpu) = irq;
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return 0;
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}
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static bool pmu_has_irq_affinity(struct device_node *node)
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{
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return !!of_find_property(node, "interrupt-affinity", NULL);
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}
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static int pmu_parse_irq_affinity(struct device_node *node, int i)
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{
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struct device_node *dn;
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int cpu;
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/*
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* If we don't have an interrupt-affinity property, we guess irq
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* affinity matches our logical CPU order, as we used to assume.
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* This is fragile, so we'll warn in pmu_parse_irqs().
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*/
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if (!pmu_has_irq_affinity(node))
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return i;
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dn = of_parse_phandle(node, "interrupt-affinity", i);
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if (!dn) {
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pr_warn("failed to parse interrupt-affinity[%d] for %s\n",
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i, node->name);
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return -EINVAL;
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}
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/* Now look up the logical CPU number */
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for_each_possible_cpu(cpu) {
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struct device_node *cpu_dn;
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cpu_dn = of_cpu_device_node_get(cpu);
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of_node_put(cpu_dn);
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if (dn == cpu_dn)
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break;
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}
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if (cpu >= nr_cpu_ids) {
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pr_warn("failed to find logical CPU for %s\n", dn->name);
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}
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of_node_put(dn);
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return cpu;
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}
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static int pmu_parse_irqs(struct arm_pmu *pmu)
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{
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int i = 0, num_irqs;
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struct platform_device *pdev = pmu->plat_device;
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struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
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num_irqs = platform_irq_count(pdev);
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if (num_irqs < 0) {
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pr_err("unable to count PMU IRQs\n");
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return num_irqs;
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}
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/*
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* In this case we have no idea which CPUs are covered by the PMU.
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* To match our prior behaviour, we assume all CPUs in this case.
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*/
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if (num_irqs == 0) {
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pr_warn("no irqs for PMU, sampling events not supported\n");
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pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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cpumask_setall(&pmu->supported_cpus);
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return 0;
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}
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if (num_irqs == 1) {
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int irq = platform_get_irq(pdev, 0);
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if (irq && irq_is_percpu_devid(irq))
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return pmu_parse_percpu_irq(pmu, irq);
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}
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if (!pmu_has_irq_affinity(pdev->dev.of_node)) {
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pr_warn("no interrupt-affinity property for %pOF, guessing.\n",
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pdev->dev.of_node);
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}
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/*
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* Some platforms have all PMU IRQs OR'd into a single IRQ, with a
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* special platdata function that attempts to demux them.
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*/
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if (dev_get_platdata(&pdev->dev))
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cpumask_setall(&pmu->supported_cpus);
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for (i = 0; i < num_irqs; i++) {
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int cpu, irq;
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irq = platform_get_irq(pdev, i);
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if (WARN_ON(irq <= 0))
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continue;
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if (irq_is_percpu_devid(irq)) {
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pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
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return -EINVAL;
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}
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cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
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if (cpu < 0)
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return cpu;
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if (cpu >= nr_cpu_ids)
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continue;
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if (per_cpu(hw_events->irq, cpu)) {
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pr_warn("multiple PMU IRQs for the same CPU detected\n");
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return -EINVAL;
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}
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per_cpu(hw_events->irq, cpu) = irq;
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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}
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return 0;
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}
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int arm_pmu_device_probe(struct platform_device *pdev,
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const struct of_device_id *of_table,
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const struct pmu_probe_info *probe_table)
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{
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const struct of_device_id *of_id;
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armpmu_init_fn init_fn;
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struct device_node *node = pdev->dev.of_node;
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struct arm_pmu *pmu;
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int ret = -ENODEV;
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pmu = armpmu_alloc();
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if (!pmu)
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return -ENOMEM;
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pmu->plat_device = pdev;
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ret = pmu_parse_irqs(pmu);
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if (ret)
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goto out_free;
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if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
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init_fn = of_id->data;
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pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
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"secure-reg-access");
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/* arm64 systems boot only as non-secure */
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if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
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pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
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pmu->secure_access = false;
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}
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ret = init_fn(pmu);
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} else if (probe_table) {
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cpumask_setall(&pmu->supported_cpus);
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ret = probe_current_pmu(pmu, probe_table);
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}
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if (ret) {
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pr_info("%pOF: failed to probe PMU!\n", node);
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goto out_free;
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}
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ret = armpmu_request_irqs(pmu);
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if (ret)
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goto out_free_irqs;
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ret = armpmu_register(pmu);
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if (ret)
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goto out_free;
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return 0;
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out_free_irqs:
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armpmu_free_irqs(pmu);
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out_free:
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pr_info("%pOF: failed to register PMU devices!\n", node);
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armpmu_free(pmu);
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return ret;
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}
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