mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-15 15:15:47 +00:00
5b0e2cb020
Non-highlights: - Five fixes for the >128T address space handling, both to fix bugs in our implementation and to bring the semantics exactly into line with x86. Highlights: - Support for a new OPAL call on bare metal machines which gives us a true NMI (ie. is not masked by MSR[EE]=0) for debugging etc. - Support for Power9 DD2 in the CXL driver. - Improvements to machine check handling so that uncorrectable errors can be reported into the generic memory_failure() machinery. - Some fixes and improvements for VPHN, which is used under PowerVM to notify the Linux partition of topology changes. - Plumbing to enable TM (transactional memory) without suspend on some Power9 processors (PPC_FEATURE2_HTM_NO_SUSPEND). - Support for emulating vector loads form cache-inhibited memory, on some Power9 revisions. - Disable the fast-endian switch "syscall" by default (behind a CONFIG), we believe it has never had any users. - A major rework of the API drivers use when initiating and waiting for long running operations performed by OPAL firmware, and changes to the powernv_flash driver to use the new API. - Several fixes for the handling of FP/VMX/VSX while processes are using transactional memory. - Optimisations of TLB range flushes when using the radix MMU on Power9. - Improvements to the VAS facility used to access coprocessors on Power9, and related improvements to the way the NX crypto driver handles requests. - Implementation of PMEM_API and UACCESS_FLUSHCACHE for 64-bit. Thanks to: Alexey Kardashevskiy, Alistair Popple, Allen Pais, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Balbir Singh, Benjamin Herrenschmidt, Breno Leitao, Christophe Leroy, Christophe Lombard, Cyril Bur, Frederic Barrat, Gautham R. Shenoy, Geert Uytterhoeven, Guilherme G. Piccoli, Gustavo Romero, Haren Myneni, Joel Stanley, Kamalesh Babulal, Kautuk Consul, Markus Elfring, Masami Hiramatsu, Michael Bringmann, Michael Neuling, Michal Suchanek, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pedro Miraglia Franco de Carvalho, Philippe Bergheaud, Sandipan Das, Seth Forshee, Shriya, Stephen Rothwell, Stewart Smith, Sukadev Bhattiprolu, Tyrel Datwyler, Vaibhav Jain, Vaidyanathan Srinivasan, William A. Kennington III. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaDXGuAAoJEFHr6jzI4aWAEqwP/0TA35KFAK6wqfkCf67z4q+O I+5piI4eDV4jdCakfoIN1JfjhQRULNePSoCHTccan30mu/bm30p69xtOLL2/h5xH Mhz/eDBAOo0lrT20nyZfYMW3FnM66wnNf++qJ0O+8L052r4WOB02J0k1uM1ST01D 5Lb5mUoxRLRzCgKRYAYWJifn+IFPUB9NMsvMTym94krAFlIjIzMEQXhDoln+jJMr QmY5f1BTA/fLfXobn0zwoc/C1oa2PUtxd+rxbwGrLoZ6G843mMqUi90SMr5ybhXp RzepnBTj4by3vOsnk/X1mANyaZfLsunp75FwnjHdPzKrAS/TuPp8D/iSxxE/PzEq cLwJFBnFXSgQMefDErXxhHSDz2dAg5r14rsTpDcq2Ko8TPV4rPsuSfmbd9Txekb0 yWHsjoJUBBMl2QcWqIHl+AlV8j1RklF6solcTBcGnH1CZJMfa05VKXV7xGEvOHa0 RJ+/xPyR9KjoB/SUp++9Vmx/M6SwQYFOJlr3Zpg9LNtR8WpoPYu1E6eO+u1Hhzny eJqaNstH+i+VdY9eqszkAsEBh8o9M/+b+7Wx7TetvU+v368CbXtgFYs9qy2oZjPF t9sY/BHaHZ8eZ7I00an77a0fVV5B1PVASUtIz5CqkwGpMvX6Z6W2K/XUUFI61kuu E06HS6Ht8UPJAzrAPUMl =Rq81 -----END PGP SIGNATURE----- Merge tag 'powerpc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: "A bit of a small release, I suspect in part due to me travelling for KS. But my backlog of patches to review is smaller than usual, so I think in part folks just didn't send as much this cycle. Non-highlights: - Five fixes for the >128T address space handling, both to fix bugs in our implementation and to bring the semantics exactly into line with x86. Highlights: - Support for a new OPAL call on bare metal machines which gives us a true NMI (ie. is not masked by MSR[EE]=0) for debugging etc. - Support for Power9 DD2 in the CXL driver. - Improvements to machine check handling so that uncorrectable errors can be reported into the generic memory_failure() machinery. - Some fixes and improvements for VPHN, which is used under PowerVM to notify the Linux partition of topology changes. - Plumbing to enable TM (transactional memory) without suspend on some Power9 processors (PPC_FEATURE2_HTM_NO_SUSPEND). - Support for emulating vector loads form cache-inhibited memory, on some Power9 revisions. - Disable the fast-endian switch "syscall" by default (behind a CONFIG), we believe it has never had any users. - A major rework of the API drivers use when initiating and waiting for long running operations performed by OPAL firmware, and changes to the powernv_flash driver to use the new API. - Several fixes for the handling of FP/VMX/VSX while processes are using transactional memory. - Optimisations of TLB range flushes when using the radix MMU on Power9. - Improvements to the VAS facility used to access coprocessors on Power9, and related improvements to the way the NX crypto driver handles requests. - Implementation of PMEM_API and UACCESS_FLUSHCACHE for 64-bit. Thanks to: Alexey Kardashevskiy, Alistair Popple, Allen Pais, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Balbir Singh, Benjamin Herrenschmidt, Breno Leitao, Christophe Leroy, Christophe Lombard, Cyril Bur, Frederic Barrat, Gautham R. Shenoy, Geert Uytterhoeven, Guilherme G. Piccoli, Gustavo Romero, Haren Myneni, Joel Stanley, Kamalesh Babulal, Kautuk Consul, Markus Elfring, Masami Hiramatsu, Michael Bringmann, Michael Neuling, Michal Suchanek, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pedro Miraglia Franco de Carvalho, Philippe Bergheaud, Sandipan Das, Seth Forshee, Shriya, Stephen Rothwell, Stewart Smith, Sukadev Bhattiprolu, Tyrel Datwyler, Vaibhav Jain, Vaidyanathan Srinivasan, and William A. Kennington III" * tag 'powerpc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (151 commits) powerpc/64s: Fix Power9 DD2.0 workarounds by adding DD2.1 feature powerpc/64s: Fix masking of SRR1 bits on instruction fault powerpc/64s: mm_context.addr_limit is only used on hash powerpc/64s/radix: Fix 128TB-512TB virtual address boundary case allocation powerpc/64s/hash: Allow MAP_FIXED allocations to cross 128TB boundary powerpc/64s/hash: Fix fork() with 512TB process address space powerpc/64s/hash: Fix 128TB-512TB virtual address boundary case allocation powerpc/64s/hash: Fix 512T hint detection to use >= 128T powerpc: Fix DABR match on hash based systems powerpc/signal: Properly handle return value from uprobe_deny_signal() powerpc/fadump: use kstrtoint to handle sysfs store powerpc/lib: Implement UACCESS_FLUSHCACHE API powerpc/lib: Implement PMEM API powerpc/powernv/npu: Don't explicitly flush nmmu tlb powerpc/powernv/npu: Use flush_all_mm() instead of flush_tlb_mm() powerpc/powernv/idle: Round up latency and residency values powerpc/kprobes: refactor kprobe_lookup_name for safer string operations powerpc/kprobes: Blacklist emulate_update_regs() from kprobes powerpc/kprobes: Do not disable interrupts for optprobes and kprobes_on_ftrace powerpc/kprobes: Disable preemption before invoking probe handler for optprobes ...
435 lines
11 KiB
Text
435 lines
11 KiB
Text
# SPDX-License-Identifier: GPL-2.0
|
|
config PPC64
|
|
bool "64-bit kernel"
|
|
default n
|
|
select ZLIB_DEFLATE
|
|
help
|
|
This option selects whether a 32-bit or a 64-bit kernel
|
|
will be built.
|
|
|
|
menu "Processor support"
|
|
choice
|
|
prompt "Processor Type"
|
|
depends on PPC32
|
|
help
|
|
There are five families of 32 bit PowerPC chips supported.
|
|
The most common ones are the desktop and server CPUs (601, 603,
|
|
604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
|
|
embedded 512x/52xx/82xx/83xx/86xx counterparts.
|
|
The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500
|
|
(85xx) each form a family of their own that is not compatible
|
|
with the others.
|
|
|
|
If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
|
|
|
|
config PPC_BOOK3S_32
|
|
bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
|
|
select PPC_FPU
|
|
|
|
config PPC_85xx
|
|
bool "Freescale 85xx"
|
|
select E500
|
|
|
|
config PPC_8xx
|
|
bool "Freescale 8xx"
|
|
select FSL_SOC
|
|
select PPC_LIB_RHEAP
|
|
select SYS_SUPPORTS_HUGETLBFS
|
|
|
|
config 40x
|
|
bool "AMCC 40x"
|
|
select PPC_DCR_NATIVE
|
|
select PPC_UDBG_16550
|
|
select 4xx_SOC
|
|
select PPC_PCI_CHOICE
|
|
|
|
config 44x
|
|
bool "AMCC 44x, 46x or 47x"
|
|
select PPC_DCR_NATIVE
|
|
select PPC_UDBG_16550
|
|
select 4xx_SOC
|
|
select PPC_PCI_CHOICE
|
|
select PHYS_64BIT
|
|
|
|
config E200
|
|
bool "Freescale e200"
|
|
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Processor Type"
|
|
depends on PPC64
|
|
help
|
|
There are two families of 64 bit PowerPC chips supported.
|
|
The most common ones are the desktop and server CPUs
|
|
(POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...)
|
|
|
|
The other are the "embedded" processors compliant with the
|
|
"Book 3E" variant of the architecture
|
|
|
|
config PPC_BOOK3S_64
|
|
bool "Server processors"
|
|
select PPC_FPU
|
|
select PPC_HAVE_PMU_SUPPORT
|
|
select SYS_SUPPORTS_HUGETLBFS
|
|
select HAVE_ARCH_TRANSPARENT_HUGEPAGE
|
|
select ARCH_SUPPORTS_NUMA_BALANCING
|
|
select IRQ_WORK
|
|
select HAVE_KERNEL_XZ
|
|
|
|
config PPC_BOOK3E_64
|
|
bool "Embedded processors"
|
|
select PPC_FPU # Make it a choice ?
|
|
select PPC_SMP_MUXED_IPI
|
|
select PPC_DOORBELL
|
|
|
|
endchoice
|
|
|
|
choice
|
|
prompt "CPU selection"
|
|
depends on PPC64
|
|
default POWER8_CPU if CPU_LITTLE_ENDIAN
|
|
default GENERIC_CPU
|
|
help
|
|
This will create a kernel which is optimised for a particular CPU.
|
|
The resulting kernel may not run on other CPUs, so use this with care.
|
|
|
|
If unsure, select Generic.
|
|
|
|
config GENERIC_CPU
|
|
bool "Generic"
|
|
depends on !CPU_LITTLE_ENDIAN
|
|
|
|
config CELL_CPU
|
|
bool "Cell Broadband Engine"
|
|
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
|
|
|
|
config POWER4_CPU
|
|
bool "POWER4"
|
|
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
|
|
|
|
config POWER5_CPU
|
|
bool "POWER5"
|
|
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
|
|
|
|
config POWER6_CPU
|
|
bool "POWER6"
|
|
depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
|
|
|
|
config POWER7_CPU
|
|
bool "POWER7"
|
|
depends on PPC_BOOK3S_64
|
|
select ARCH_HAS_FAST_MULTIPLIER
|
|
|
|
config POWER8_CPU
|
|
bool "POWER8"
|
|
depends on PPC_BOOK3S_64
|
|
select ARCH_HAS_FAST_MULTIPLIER
|
|
|
|
config E5500_CPU
|
|
bool "Freescale e5500"
|
|
depends on E500
|
|
|
|
config E6500_CPU
|
|
bool "Freescale e6500"
|
|
depends on E500
|
|
|
|
endchoice
|
|
|
|
config PPC_BOOK3S
|
|
def_bool y
|
|
depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
|
|
|
|
config PPC_BOOK3E
|
|
def_bool y
|
|
depends on PPC_BOOK3E_64
|
|
|
|
config 6xx
|
|
def_bool y
|
|
depends on PPC32 && PPC_BOOK3S
|
|
select PPC_HAVE_PMU_SUPPORT
|
|
|
|
config E500
|
|
select FSL_EMB_PERFMON
|
|
select PPC_FSL_BOOK3E
|
|
bool
|
|
|
|
config PPC_E500MC
|
|
bool "e500mc Support"
|
|
select PPC_FPU
|
|
select COMMON_CLK
|
|
depends on E500
|
|
help
|
|
This must be enabled for running on e500mc (and derivatives
|
|
such as e5500/e6500), and must be disabled for running on
|
|
e500v1 or e500v2.
|
|
|
|
config PPC_FPU
|
|
bool
|
|
default y if PPC64
|
|
|
|
config PPC_8xx_PERF_EVENT
|
|
bool "PPC 8xx perf events"
|
|
depends on PPC_8xx && PERF_EVENTS
|
|
help
|
|
This is Performance Events support for PPC 8xx. The 8xx doesn't
|
|
have a PMU but some events are emulated using 8xx features.
|
|
|
|
config FSL_EMB_PERFMON
|
|
bool "Freescale Embedded Perfmon"
|
|
depends on E500 || PPC_83xx
|
|
help
|
|
This is the Performance Monitor support found on the e500 core
|
|
and some e300 cores (c3 and c4). Select this only if your
|
|
core supports the Embedded Performance Monitor APU
|
|
|
|
config FSL_EMB_PERF_EVENT
|
|
bool
|
|
depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
|
|
default y
|
|
|
|
config FSL_EMB_PERF_EVENT_E500
|
|
bool
|
|
depends on FSL_EMB_PERF_EVENT && E500
|
|
default y
|
|
|
|
config 4xx
|
|
bool
|
|
depends on 40x || 44x
|
|
default y
|
|
|
|
config BOOKE
|
|
bool
|
|
depends on E200 || E500 || 44x || PPC_BOOK3E
|
|
default y
|
|
|
|
config FSL_BOOKE
|
|
bool
|
|
depends on (E200 || E500) && PPC32
|
|
default y
|
|
|
|
# this is for common code between PPC32 & PPC64 FSL BOOKE
|
|
config PPC_FSL_BOOK3E
|
|
bool
|
|
select FSL_EMB_PERFMON
|
|
select PPC_SMP_MUXED_IPI
|
|
select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
|
|
select PPC_DOORBELL
|
|
default y if FSL_BOOKE
|
|
|
|
config PTE_64BIT
|
|
bool
|
|
depends on 44x || E500 || PPC_86xx
|
|
default y if PHYS_64BIT
|
|
|
|
config PHYS_64BIT
|
|
bool 'Large physical address support' if E500 || PPC_86xx
|
|
depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
|
|
---help---
|
|
This option enables kernel support for larger than 32-bit physical
|
|
addresses. This feature may not be available on all cores.
|
|
|
|
If you have more than 3.5GB of RAM or so, you also need to enable
|
|
SWIOTLB under Kernel Options for this to work. The actual number
|
|
is platform-dependent.
|
|
|
|
If in doubt, say N here.
|
|
|
|
config ALTIVEC
|
|
bool "AltiVec Support"
|
|
depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
|
|
---help---
|
|
This option enables kernel support for the Altivec extensions to the
|
|
PowerPC processor. The kernel currently supports saving and restoring
|
|
altivec registers, and turning on the 'altivec enable' bit so user
|
|
processes can execute altivec instructions.
|
|
|
|
This option is only usefully if you have a processor that supports
|
|
altivec (G4, otherwise known as 74xx series), but does not have
|
|
any affect on a non-altivec cpu (it does, however add code to the
|
|
kernel).
|
|
|
|
If in doubt, say Y here.
|
|
|
|
config VSX
|
|
bool "VSX Support"
|
|
depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU
|
|
---help---
|
|
|
|
This option enables kernel support for the Vector Scaler extensions
|
|
to the PowerPC processor. The kernel currently supports saving and
|
|
restoring VSX registers, and turning on the 'VSX enable' bit so user
|
|
processes can execute VSX instructions.
|
|
|
|
This option is only useful if you have a processor that supports
|
|
VSX (P7 and above), but does not have any affect on a non-VSX
|
|
CPUs (it does, however add code to the kernel).
|
|
|
|
If in doubt, say Y here.
|
|
|
|
config SPE_POSSIBLE
|
|
def_bool y
|
|
depends on E200 || (E500 && !PPC_E500MC)
|
|
|
|
config SPE
|
|
bool "SPE Support"
|
|
depends on SPE_POSSIBLE
|
|
default y
|
|
---help---
|
|
This option enables kernel support for the Signal Processing
|
|
Extensions (SPE) to the PowerPC processor. The kernel currently
|
|
supports saving and restoring SPE registers, and turning on the
|
|
'spe enable' bit so user processes can execute SPE instructions.
|
|
|
|
This option is only useful if you have a processor that supports
|
|
SPE (e500, otherwise known as 85xx series), but does not have any
|
|
effect on a non-spe cpu (it does, however add code to the kernel).
|
|
|
|
If in doubt, say Y here.
|
|
|
|
config PPC_STD_MMU
|
|
def_bool y
|
|
depends on PPC_BOOK3S
|
|
|
|
config PPC_STD_MMU_32
|
|
def_bool y
|
|
depends on PPC_STD_MMU && PPC32
|
|
|
|
config PPC_RADIX_MMU
|
|
bool "Radix MMU Support"
|
|
depends on PPC_BOOK3S_64
|
|
select ARCH_HAS_GIGANTIC_PAGE if (MEMORY_ISOLATION && COMPACTION) || CMA
|
|
default y
|
|
help
|
|
Enable support for the Power ISA 3.0 Radix style MMU. Currently this
|
|
is only implemented by IBM Power9 CPUs, if you don't have one of them
|
|
you can probably disable this.
|
|
|
|
config PPC_RADIX_MMU_DEFAULT
|
|
bool "Default to using the Radix MMU when possible"
|
|
depends on PPC_RADIX_MMU
|
|
default y
|
|
help
|
|
When the hardware supports the Radix MMU, default to using it unless
|
|
"disable_radix[=yes]" is specified on the kernel command line.
|
|
|
|
If this option is disabled, the Hash MMU will be used by default,
|
|
unless "disable_radix=no" is specified on the kernel command line.
|
|
|
|
If you're unsure, say Y.
|
|
|
|
config ARCH_ENABLE_HUGEPAGE_MIGRATION
|
|
def_bool y
|
|
depends on PPC_BOOK3S_64 && HUGETLB_PAGE && MIGRATION
|
|
|
|
|
|
config PPC_MMU_NOHASH
|
|
def_bool y
|
|
depends on !PPC_STD_MMU
|
|
|
|
config PPC_BOOK3E_MMU
|
|
def_bool y
|
|
depends on FSL_BOOKE || PPC_BOOK3E
|
|
|
|
config PPC_MM_SLICES
|
|
bool
|
|
default y if PPC_BOOK3S_64
|
|
default n
|
|
|
|
config PPC_HAVE_PMU_SUPPORT
|
|
bool
|
|
|
|
config PPC_PERF_CTRS
|
|
def_bool y
|
|
depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
|
|
help
|
|
This enables the powerpc-specific perf_event back-end.
|
|
|
|
config FORCE_SMP
|
|
# Allow platforms to force SMP=y by selecting this
|
|
bool
|
|
default n
|
|
select SMP
|
|
|
|
config SMP
|
|
depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
|
|
select GENERIC_IRQ_MIGRATION
|
|
bool "Symmetric multi-processing support" if !FORCE_SMP
|
|
---help---
|
|
This enables support for systems with more than one CPU. If you have
|
|
a system with only one CPU, say N. If you have a system with more
|
|
than one CPU, say Y. Note that the kernel does not currently
|
|
support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
|
|
since they have inadequate hardware support for multiprocessor
|
|
operation.
|
|
|
|
If you say N here, the kernel will run on single and multiprocessor
|
|
machines, but will use only one CPU of a multiprocessor machine. If
|
|
you say Y here, the kernel will run on single-processor machines.
|
|
On a single-processor machine, the kernel will run faster if you say
|
|
N here.
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
config NR_CPUS
|
|
int "Maximum number of CPUs (2-8192)"
|
|
range 2 8192
|
|
depends on SMP
|
|
default "32" if PPC64
|
|
default "4"
|
|
|
|
config NOT_COHERENT_CACHE
|
|
bool
|
|
depends on 4xx || PPC_8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
|
|
default n if PPC_47x
|
|
default y
|
|
|
|
config CHECK_CACHE_COHERENCY
|
|
bool
|
|
|
|
config PPC_DOORBELL
|
|
bool
|
|
default n
|
|
|
|
endmenu
|
|
|
|
config VDSO32
|
|
def_bool y
|
|
depends on PPC32 || CPU_BIG_ENDIAN
|
|
help
|
|
This symbol controls whether we build the 32-bit VDSO. We obviously
|
|
want to do that if we're building a 32-bit kernel. If we're building
|
|
a 64-bit kernel then we only want a 32-bit VDSO if we're building for
|
|
big endian. That is because the only little endian configuration we
|
|
support is ppc64le which is 64-bit only.
|
|
|
|
choice
|
|
prompt "Endianness selection"
|
|
default CPU_BIG_ENDIAN
|
|
help
|
|
This option selects whether a big endian or little endian kernel will
|
|
be built.
|
|
|
|
config CPU_BIG_ENDIAN
|
|
bool "Build big endian kernel"
|
|
help
|
|
Build a big endian kernel.
|
|
|
|
If unsure, select this option.
|
|
|
|
config CPU_LITTLE_ENDIAN
|
|
bool "Build little endian kernel"
|
|
depends on PPC_BOOK3S_64
|
|
select PPC64_BOOT_WRAPPER
|
|
help
|
|
Build a little endian kernel.
|
|
|
|
Note that if cross compiling a little endian kernel,
|
|
CROSS_COMPILE must point to a toolchain capable of targeting
|
|
little endian powerpc.
|
|
|
|
endchoice
|
|
|
|
config PPC64_BOOT_WRAPPER
|
|
def_bool n
|
|
depends on CPU_LITTLE_ENDIAN
|