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![Kieran Bingham](/assets/img/avatar_default.png)
When display lists are linked in a chain, they will be processed automatically by the hardware, with each list linking to the next. Only on the last display list will the frame end interrupt be fired to mark the completion event. Upon frame-end, the chain will be iterated to release each display list back to the free list. The chained lists use case (image partitioning) can require up to 64 lists per frame in the worst case scenario, bump up the number of preallocated lists. Signed-off-by: Kieran Bingham <kieran+renesas@bingham.xyz> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
721 lines
19 KiB
C
721 lines
19 KiB
C
/*
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* vsp1_dl.h -- R-Car VSP1 Display List
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*
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* Copyright (C) 2015 Renesas Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include "vsp1.h"
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#include "vsp1_dl.h"
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#define VSP1_DL_NUM_ENTRIES 256
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#define VSP1_DLH_INT_ENABLE (1 << 1)
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#define VSP1_DLH_AUTO_START (1 << 0)
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struct vsp1_dl_header_list {
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u32 num_bytes;
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u32 addr;
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} __attribute__((__packed__));
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struct vsp1_dl_header {
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u32 num_lists;
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struct vsp1_dl_header_list lists[8];
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u32 next_header;
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u32 flags;
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} __attribute__((__packed__));
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struct vsp1_dl_entry {
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u32 addr;
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u32 data;
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} __attribute__((__packed__));
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/**
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* struct vsp1_dl_body - Display list body
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* @list: entry in the display list list of bodies
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* @vsp1: the VSP1 device
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* @entries: array of entries
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* @dma: DMA address of the entries
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* @size: size of the DMA memory in bytes
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* @num_entries: number of stored entries
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*/
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struct vsp1_dl_body {
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struct list_head list;
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struct vsp1_device *vsp1;
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struct vsp1_dl_entry *entries;
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dma_addr_t dma;
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size_t size;
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unsigned int num_entries;
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};
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/**
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* struct vsp1_dl_list - Display list
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* @list: entry in the display list manager lists
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* @dlm: the display list manager
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* @header: display list header, NULL for headerless lists
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* @dma: DMA address for the header
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* @body0: first display list body
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* @fragments: list of extra display list bodies
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* @chain: entry in the display list partition chain
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*/
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struct vsp1_dl_list {
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struct list_head list;
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struct vsp1_dl_manager *dlm;
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struct vsp1_dl_header *header;
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dma_addr_t dma;
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struct vsp1_dl_body body0;
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struct list_head fragments;
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bool has_chain;
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struct list_head chain;
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};
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enum vsp1_dl_mode {
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VSP1_DL_MODE_HEADER,
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VSP1_DL_MODE_HEADERLESS,
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};
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/**
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* struct vsp1_dl_manager - Display List manager
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* @index: index of the related WPF
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* @mode: display list operation mode (header or headerless)
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* @vsp1: the VSP1 device
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* @lock: protects the free, active, queued, pending and gc_fragments lists
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* @free: array of all free display lists
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* @active: list currently being processed (loaded) by hardware
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* @queued: list queued to the hardware (written to the DL registers)
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* @pending: list waiting to be queued to the hardware
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* @gc_work: fragments garbage collector work struct
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* @gc_fragments: array of display list fragments waiting to be freed
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*/
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struct vsp1_dl_manager {
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unsigned int index;
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enum vsp1_dl_mode mode;
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struct vsp1_device *vsp1;
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spinlock_t lock;
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struct list_head free;
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struct vsp1_dl_list *active;
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struct vsp1_dl_list *queued;
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struct vsp1_dl_list *pending;
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struct work_struct gc_work;
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struct list_head gc_fragments;
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};
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/* -----------------------------------------------------------------------------
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* Display List Body Management
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*/
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/*
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* Initialize a display list body object and allocate DMA memory for the body
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* data. The display list body object is expected to have been initialized to
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* 0 when allocated.
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*/
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static int vsp1_dl_body_init(struct vsp1_device *vsp1,
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struct vsp1_dl_body *dlb, unsigned int num_entries,
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size_t extra_size)
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{
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size_t size = num_entries * sizeof(*dlb->entries) + extra_size;
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dlb->vsp1 = vsp1;
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dlb->size = size;
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dlb->entries = dma_alloc_wc(vsp1->dev, dlb->size, &dlb->dma,
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GFP_KERNEL);
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if (!dlb->entries)
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return -ENOMEM;
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return 0;
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}
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/*
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* Cleanup a display list body and free allocated DMA memory allocated.
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*/
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static void vsp1_dl_body_cleanup(struct vsp1_dl_body *dlb)
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{
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dma_free_wc(dlb->vsp1->dev, dlb->size, dlb->entries, dlb->dma);
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}
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/**
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* vsp1_dl_fragment_alloc - Allocate a display list fragment
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* @vsp1: The VSP1 device
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* @num_entries: The maximum number of entries that the fragment can contain
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*
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* Allocate a display list fragment with enough memory to contain the requested
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* number of entries.
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*
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* Return a pointer to a fragment on success or NULL if memory can't be
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* allocated.
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*/
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struct vsp1_dl_body *vsp1_dl_fragment_alloc(struct vsp1_device *vsp1,
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unsigned int num_entries)
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{
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struct vsp1_dl_body *dlb;
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int ret;
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dlb = kzalloc(sizeof(*dlb), GFP_KERNEL);
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if (!dlb)
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return NULL;
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ret = vsp1_dl_body_init(vsp1, dlb, num_entries, 0);
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if (ret < 0) {
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kfree(dlb);
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return NULL;
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}
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return dlb;
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}
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/**
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* vsp1_dl_fragment_free - Free a display list fragment
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* @dlb: The fragment
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*
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* Free the given display list fragment and the associated DMA memory.
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*
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* Fragments must only be freed explicitly if they are not added to a display
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* list, as the display list will take ownership of them and free them
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* otherwise. Manual free typically happens at cleanup time for fragments that
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* have been allocated but not used.
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*
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* Passing a NULL pointer to this function is safe, in that case no operation
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* will be performed.
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*/
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void vsp1_dl_fragment_free(struct vsp1_dl_body *dlb)
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{
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if (!dlb)
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return;
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vsp1_dl_body_cleanup(dlb);
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kfree(dlb);
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}
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/**
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* vsp1_dl_fragment_write - Write a register to a display list fragment
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* @dlb: The fragment
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* @reg: The register address
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* @data: The register value
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*
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* Write the given register and value to the display list fragment. The maximum
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* number of entries that can be written in a fragment is specified when the
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* fragment is allocated by vsp1_dl_fragment_alloc().
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*/
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void vsp1_dl_fragment_write(struct vsp1_dl_body *dlb, u32 reg, u32 data)
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{
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dlb->entries[dlb->num_entries].addr = reg;
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dlb->entries[dlb->num_entries].data = data;
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dlb->num_entries++;
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}
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/* -----------------------------------------------------------------------------
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* Display List Transaction Management
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*/
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static struct vsp1_dl_list *vsp1_dl_list_alloc(struct vsp1_dl_manager *dlm)
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{
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struct vsp1_dl_list *dl;
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size_t header_size;
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int ret;
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dl = kzalloc(sizeof(*dl), GFP_KERNEL);
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if (!dl)
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return NULL;
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INIT_LIST_HEAD(&dl->fragments);
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dl->dlm = dlm;
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/* Initialize the display list body and allocate DMA memory for the body
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* and the optional header. Both are allocated together to avoid memory
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* fragmentation, with the header located right after the body in
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* memory.
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*/
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header_size = dlm->mode == VSP1_DL_MODE_HEADER
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? ALIGN(sizeof(struct vsp1_dl_header), 8)
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: 0;
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ret = vsp1_dl_body_init(dlm->vsp1, &dl->body0, VSP1_DL_NUM_ENTRIES,
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header_size);
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if (ret < 0) {
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kfree(dl);
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return NULL;
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}
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if (dlm->mode == VSP1_DL_MODE_HEADER) {
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size_t header_offset = VSP1_DL_NUM_ENTRIES
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* sizeof(*dl->body0.entries);
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dl->header = ((void *)dl->body0.entries) + header_offset;
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dl->dma = dl->body0.dma + header_offset;
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memset(dl->header, 0, sizeof(*dl->header));
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dl->header->lists[0].addr = dl->body0.dma;
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}
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return dl;
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}
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static void vsp1_dl_list_free(struct vsp1_dl_list *dl)
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{
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vsp1_dl_body_cleanup(&dl->body0);
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list_splice_init(&dl->fragments, &dl->dlm->gc_fragments);
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kfree(dl);
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}
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/**
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* vsp1_dl_list_get - Get a free display list
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* @dlm: The display list manager
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*
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* Get a display list from the pool of free lists and return it.
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*
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* This function must be called without the display list manager lock held.
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*/
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struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm)
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{
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struct vsp1_dl_list *dl = NULL;
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unsigned long flags;
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spin_lock_irqsave(&dlm->lock, flags);
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if (!list_empty(&dlm->free)) {
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dl = list_first_entry(&dlm->free, struct vsp1_dl_list, list);
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list_del(&dl->list);
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/* The display list chain must be initialised to ensure every
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* display list can assert list_empty() if it is not in a chain.
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*/
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INIT_LIST_HEAD(&dl->chain);
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}
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spin_unlock_irqrestore(&dlm->lock, flags);
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return dl;
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}
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/* This function must be called with the display list manager lock held.*/
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static void __vsp1_dl_list_put(struct vsp1_dl_list *dl)
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{
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struct vsp1_dl_list *dl_child;
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if (!dl)
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return;
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/* Release any linked display-lists which were chained for a single
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* hardware operation.
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*/
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if (dl->has_chain) {
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list_for_each_entry(dl_child, &dl->chain, chain)
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__vsp1_dl_list_put(dl_child);
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}
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dl->has_chain = false;
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/* We can't free fragments here as DMA memory can only be freed in
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* interruptible context. Move all fragments to the display list
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* manager's list of fragments to be freed, they will be
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* garbage-collected by the work queue.
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*/
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if (!list_empty(&dl->fragments)) {
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list_splice_init(&dl->fragments, &dl->dlm->gc_fragments);
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schedule_work(&dl->dlm->gc_work);
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}
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dl->body0.num_entries = 0;
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list_add_tail(&dl->list, &dl->dlm->free);
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}
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/**
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* vsp1_dl_list_put - Release a display list
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* @dl: The display list
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*
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* Release the display list and return it to the pool of free lists.
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*
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* Passing a NULL pointer to this function is safe, in that case no operation
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* will be performed.
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*/
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void vsp1_dl_list_put(struct vsp1_dl_list *dl)
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{
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unsigned long flags;
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if (!dl)
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return;
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spin_lock_irqsave(&dl->dlm->lock, flags);
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__vsp1_dl_list_put(dl);
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spin_unlock_irqrestore(&dl->dlm->lock, flags);
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}
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/**
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* vsp1_dl_list_write - Write a register to the display list
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* @dl: The display list
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* @reg: The register address
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* @data: The register value
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*
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* Write the given register and value to the display list. Up to 256 registers
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* can be written per display list.
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*/
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void vsp1_dl_list_write(struct vsp1_dl_list *dl, u32 reg, u32 data)
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{
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vsp1_dl_fragment_write(&dl->body0, reg, data);
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}
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/**
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* vsp1_dl_list_add_fragment - Add a fragment to the display list
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* @dl: The display list
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* @dlb: The fragment
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*
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* Add a display list body as a fragment to a display list. Registers contained
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* in fragments are processed after registers contained in the main display
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* list, in the order in which fragments are added.
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*
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* Adding a fragment to a display list passes ownership of the fragment to the
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* list. The caller must not touch the fragment after this call, and must not
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* free it explicitly with vsp1_dl_fragment_free().
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*
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* Fragments are only usable for display lists in header mode. Attempt to
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* add a fragment to a header-less display list will return an error.
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*/
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int vsp1_dl_list_add_fragment(struct vsp1_dl_list *dl,
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struct vsp1_dl_body *dlb)
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{
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/* Multi-body lists are only available in header mode. */
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if (dl->dlm->mode != VSP1_DL_MODE_HEADER)
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return -EINVAL;
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list_add_tail(&dlb->list, &dl->fragments);
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return 0;
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}
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/**
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* vsp1_dl_list_add_chain - Add a display list to a chain
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* @head: The head display list
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* @dl: The new display list
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*
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* Add a display list to an existing display list chain. The chained lists
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* will be automatically processed by the hardware without intervention from
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* the CPU. A display list end interrupt will only complete after the last
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* display list in the chain has completed processing.
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*
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* Adding a display list to a chain passes ownership of the display list to
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* the head display list item. The chain is released when the head dl item is
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* put back with __vsp1_dl_list_put().
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*
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* Chained display lists are only usable in header mode. Attempts to add a
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* display list to a chain in header-less mode will return an error.
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*/
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int vsp1_dl_list_add_chain(struct vsp1_dl_list *head,
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struct vsp1_dl_list *dl)
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{
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/* Chained lists are only available in header mode. */
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if (head->dlm->mode != VSP1_DL_MODE_HEADER)
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return -EINVAL;
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head->has_chain = true;
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list_add_tail(&dl->chain, &head->chain);
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return 0;
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}
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static void vsp1_dl_list_fill_header(struct vsp1_dl_list *dl, bool is_last)
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{
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struct vsp1_dl_header_list *hdr = dl->header->lists;
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struct vsp1_dl_body *dlb;
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unsigned int num_lists = 0;
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/* Fill the header with the display list bodies addresses and sizes. The
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* address of the first body has already been filled when the display
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* list was allocated.
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*/
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hdr->num_bytes = dl->body0.num_entries
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* sizeof(*dl->header->lists);
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list_for_each_entry(dlb, &dl->fragments, list) {
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num_lists++;
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hdr++;
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hdr->addr = dlb->dma;
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hdr->num_bytes = dlb->num_entries
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* sizeof(*dl->header->lists);
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}
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dl->header->num_lists = num_lists;
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/* If this display list's chain is not empty, we are on a list, where
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* the next item in the list is the display list entity which should be
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* automatically queued by the hardware.
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*/
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if (!list_empty(&dl->chain) && !is_last) {
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struct vsp1_dl_list *next = list_next_entry(dl, chain);
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dl->header->next_header = next->dma;
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dl->header->flags = VSP1_DLH_AUTO_START;
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} else {
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dl->header->flags = VSP1_DLH_INT_ENABLE;
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}
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}
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void vsp1_dl_list_commit(struct vsp1_dl_list *dl)
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{
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struct vsp1_dl_manager *dlm = dl->dlm;
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struct vsp1_device *vsp1 = dlm->vsp1;
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unsigned long flags;
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bool update;
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spin_lock_irqsave(&dlm->lock, flags);
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if (dl->dlm->mode == VSP1_DL_MODE_HEADER) {
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struct vsp1_dl_list *dl_child;
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/* In header mode the caller guarantees that the hardware is
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* idle at this point.
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*/
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/* Fill the header for the head and chained display lists. */
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vsp1_dl_list_fill_header(dl, list_empty(&dl->chain));
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list_for_each_entry(dl_child, &dl->chain, chain) {
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bool last = list_is_last(&dl_child->chain, &dl->chain);
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vsp1_dl_list_fill_header(dl_child, last);
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}
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|
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/* Commit the head display list to hardware. Chained headers
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* will auto-start.
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*/
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vsp1_write(vsp1, VI6_DL_HDR_ADDR(dlm->index), dl->dma);
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dlm->active = dl;
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goto done;
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}
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|
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/* Once the UPD bit has been set the hardware can start processing the
|
|
* display list at any time and we can't touch the address and size
|
|
* registers. In that case mark the update as pending, it will be
|
|
* queued up to the hardware by the frame end interrupt handler.
|
|
*/
|
|
update = !!(vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD);
|
|
if (update) {
|
|
__vsp1_dl_list_put(dlm->pending);
|
|
dlm->pending = dl;
|
|
goto done;
|
|
}
|
|
|
|
/* Program the hardware with the display list body address and size.
|
|
* The UPD bit will be cleared by the device when the display list is
|
|
* processed.
|
|
*/
|
|
vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), dl->body0.dma);
|
|
vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
|
|
(dl->body0.num_entries * sizeof(*dl->header->lists)));
|
|
|
|
__vsp1_dl_list_put(dlm->queued);
|
|
dlm->queued = dl;
|
|
|
|
done:
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Display List Manager
|
|
*/
|
|
|
|
/* Interrupt Handling */
|
|
void vsp1_dlm_irq_display_start(struct vsp1_dl_manager *dlm)
|
|
{
|
|
spin_lock(&dlm->lock);
|
|
|
|
/* The display start interrupt signals the end of the display list
|
|
* processing by the device. The active display list, if any, won't be
|
|
* accessed anymore and can be reused.
|
|
*/
|
|
__vsp1_dl_list_put(dlm->active);
|
|
dlm->active = NULL;
|
|
|
|
spin_unlock(&dlm->lock);
|
|
}
|
|
|
|
void vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_device *vsp1 = dlm->vsp1;
|
|
|
|
spin_lock(&dlm->lock);
|
|
|
|
__vsp1_dl_list_put(dlm->active);
|
|
dlm->active = NULL;
|
|
|
|
/* Header mode is used for mem-to-mem pipelines only. We don't need to
|
|
* perform any operation as there can't be any new display list queued
|
|
* in that case.
|
|
*/
|
|
if (dlm->mode == VSP1_DL_MODE_HEADER)
|
|
goto done;
|
|
|
|
/* The UPD bit set indicates that the commit operation raced with the
|
|
* interrupt and occurred after the frame end event and UPD clear but
|
|
* before interrupt processing. The hardware hasn't taken the update
|
|
* into account yet, we'll thus skip one frame and retry.
|
|
*/
|
|
if (vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD)
|
|
goto done;
|
|
|
|
/* The device starts processing the queued display list right after the
|
|
* frame end interrupt. The display list thus becomes active.
|
|
*/
|
|
if (dlm->queued) {
|
|
dlm->active = dlm->queued;
|
|
dlm->queued = NULL;
|
|
}
|
|
|
|
/* Now that the UPD bit has been cleared we can queue the next display
|
|
* list to the hardware if one has been prepared.
|
|
*/
|
|
if (dlm->pending) {
|
|
struct vsp1_dl_list *dl = dlm->pending;
|
|
|
|
vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), dl->body0.dma);
|
|
vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
|
|
(dl->body0.num_entries *
|
|
sizeof(*dl->header->lists)));
|
|
|
|
dlm->queued = dl;
|
|
dlm->pending = NULL;
|
|
}
|
|
|
|
done:
|
|
spin_unlock(&dlm->lock);
|
|
}
|
|
|
|
/* Hardware Setup */
|
|
void vsp1_dlm_setup(struct vsp1_device *vsp1)
|
|
{
|
|
u32 ctrl = (256 << VI6_DL_CTRL_AR_WAIT_SHIFT)
|
|
| VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
|
|
| VI6_DL_CTRL_DLE;
|
|
|
|
/* The DRM pipeline operates with display lists in Continuous Frame
|
|
* Mode, all other pipelines use manual start.
|
|
*/
|
|
if (vsp1->drm)
|
|
ctrl |= VI6_DL_CTRL_CFM0 | VI6_DL_CTRL_NH0;
|
|
|
|
vsp1_write(vsp1, VI6_DL_CTRL, ctrl);
|
|
vsp1_write(vsp1, VI6_DL_SWAP, VI6_DL_SWAP_LWS);
|
|
}
|
|
|
|
void vsp1_dlm_reset(struct vsp1_dl_manager *dlm)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&dlm->lock, flags);
|
|
|
|
__vsp1_dl_list_put(dlm->active);
|
|
__vsp1_dl_list_put(dlm->queued);
|
|
__vsp1_dl_list_put(dlm->pending);
|
|
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
|
|
dlm->active = NULL;
|
|
dlm->queued = NULL;
|
|
dlm->pending = NULL;
|
|
}
|
|
|
|
/*
|
|
* Free all fragments awaiting to be garbage-collected.
|
|
*
|
|
* This function must be called without the display list manager lock held.
|
|
*/
|
|
static void vsp1_dlm_fragments_free(struct vsp1_dl_manager *dlm)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&dlm->lock, flags);
|
|
|
|
while (!list_empty(&dlm->gc_fragments)) {
|
|
struct vsp1_dl_body *dlb;
|
|
|
|
dlb = list_first_entry(&dlm->gc_fragments, struct vsp1_dl_body,
|
|
list);
|
|
list_del(&dlb->list);
|
|
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
vsp1_dl_fragment_free(dlb);
|
|
spin_lock_irqsave(&dlm->lock, flags);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&dlm->lock, flags);
|
|
}
|
|
|
|
static void vsp1_dlm_garbage_collect(struct work_struct *work)
|
|
{
|
|
struct vsp1_dl_manager *dlm =
|
|
container_of(work, struct vsp1_dl_manager, gc_work);
|
|
|
|
vsp1_dlm_fragments_free(dlm);
|
|
}
|
|
|
|
struct vsp1_dl_manager *vsp1_dlm_create(struct vsp1_device *vsp1,
|
|
unsigned int index,
|
|
unsigned int prealloc)
|
|
{
|
|
struct vsp1_dl_manager *dlm;
|
|
unsigned int i;
|
|
|
|
dlm = devm_kzalloc(vsp1->dev, sizeof(*dlm), GFP_KERNEL);
|
|
if (!dlm)
|
|
return NULL;
|
|
|
|
dlm->index = index;
|
|
dlm->mode = index == 0 && !vsp1->info->uapi
|
|
? VSP1_DL_MODE_HEADERLESS : VSP1_DL_MODE_HEADER;
|
|
dlm->vsp1 = vsp1;
|
|
|
|
spin_lock_init(&dlm->lock);
|
|
INIT_LIST_HEAD(&dlm->free);
|
|
INIT_LIST_HEAD(&dlm->gc_fragments);
|
|
INIT_WORK(&dlm->gc_work, vsp1_dlm_garbage_collect);
|
|
|
|
for (i = 0; i < prealloc; ++i) {
|
|
struct vsp1_dl_list *dl;
|
|
|
|
dl = vsp1_dl_list_alloc(dlm);
|
|
if (!dl)
|
|
return NULL;
|
|
|
|
list_add_tail(&dl->list, &dlm->free);
|
|
}
|
|
|
|
return dlm;
|
|
}
|
|
|
|
void vsp1_dlm_destroy(struct vsp1_dl_manager *dlm)
|
|
{
|
|
struct vsp1_dl_list *dl, *next;
|
|
|
|
if (!dlm)
|
|
return;
|
|
|
|
cancel_work_sync(&dlm->gc_work);
|
|
|
|
list_for_each_entry_safe(dl, next, &dlm->free, list) {
|
|
list_del(&dl->list);
|
|
vsp1_dl_list_free(dl);
|
|
}
|
|
|
|
vsp1_dlm_fragments_free(dlm);
|
|
}
|