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![Laurent Pinchart](/assets/img/avatar_default.png)
The new VSP1_ENTITY_PARAMS_PARTITION configuration parameters type covers all registers that need to be configured for every partition. This prepares for support of image partitioning, and replaces the .set_memory() operation as the memory registers take different values for every partition. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
604 lines
17 KiB
C
604 lines
17 KiB
C
/*
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* vsp1_drm.c -- R-Car VSP1 DRM API
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <media/media-entity.h>
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#include <media/v4l2-subdev.h>
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#include <media/vsp1.h>
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#include "vsp1.h"
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#include "vsp1_bru.h"
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#include "vsp1_dl.h"
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#include "vsp1_drm.h"
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#include "vsp1_lif.h"
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#include "vsp1_pipe.h"
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#include "vsp1_rwpf.h"
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/* -----------------------------------------------------------------------------
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* Interrupt Handling
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*/
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void vsp1_drm_display_start(struct vsp1_device *vsp1)
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{
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vsp1_dlm_irq_display_start(vsp1->drm->pipe.output->dlm);
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}
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/* -----------------------------------------------------------------------------
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* DU Driver API
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*/
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int vsp1_du_init(struct device *dev)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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if (!vsp1)
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return -EPROBE_DEFER;
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return 0;
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}
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EXPORT_SYMBOL_GPL(vsp1_du_init);
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/**
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* vsp1_du_setup_lif - Setup the output part of the VSP pipeline
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* @dev: the VSP device
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* @width: output frame width in pixels
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* @height: output frame height in pixels
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*
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* Configure the output part of VSP DRM pipeline for the given frame @width and
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* @height. This sets up formats on the BRU source pad, the WPF0 sink and source
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* pads, and the LIF sink pad.
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*
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* As the media bus code on the BRU source pad is conditioned by the
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* configuration of the BRU sink 0 pad, we also set up the formats on all BRU
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* sinks, even if the configuration will be overwritten later by
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* vsp1_du_setup_rpf(). This ensures that the BRU configuration is set to a well
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* defined state.
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*
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* Return 0 on success or a negative error code on failure.
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*/
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int vsp1_du_setup_lif(struct device *dev, unsigned int width,
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unsigned int height)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
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struct vsp1_bru *bru = vsp1->bru;
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struct v4l2_subdev_format format;
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unsigned int i;
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int ret;
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dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n",
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__func__, width, height);
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if (width == 0 || height == 0) {
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/* Zero width or height means the CRTC is being disabled, stop
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* the pipeline and turn the light off.
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*/
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ret = vsp1_pipeline_stop(pipe);
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if (ret == -ETIMEDOUT)
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dev_err(vsp1->dev, "DRM pipeline stop timeout\n");
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media_entity_pipeline_stop(&pipe->output->entity.subdev.entity);
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for (i = 0; i < bru->entity.source_pad; ++i) {
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vsp1->drm->inputs[i].enabled = false;
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bru->inputs[i].rpf = NULL;
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pipe->inputs[i] = NULL;
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}
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pipe->num_inputs = 0;
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vsp1_dlm_reset(pipe->output->dlm);
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vsp1_device_put(vsp1);
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dev_dbg(vsp1->dev, "%s: pipeline disabled\n", __func__);
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return 0;
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}
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/* Configure the format at the BRU sinks and propagate it through the
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* pipeline.
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*/
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memset(&format, 0, sizeof(format));
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format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
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for (i = 0; i < bru->entity.source_pad; ++i) {
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format.pad = i;
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format.format.width = width;
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format.format.height = height;
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format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
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format.format.field = V4L2_FIELD_NONE;
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ret = v4l2_subdev_call(&bru->entity.subdev, pad,
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set_fmt, NULL, &format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
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__func__, format.format.width, format.format.height,
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format.format.code, i);
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}
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format.pad = bru->entity.source_pad;
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format.format.width = width;
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format.format.height = height;
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format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
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format.format.field = V4L2_FIELD_NONE;
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ret = v4l2_subdev_call(&bru->entity.subdev, pad, set_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
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__func__, format.format.width, format.format.height,
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format.format.code, i);
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format.pad = RWPF_PAD_SINK;
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ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, set_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on WPF0 sink\n",
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__func__, format.format.width, format.format.height,
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format.format.code);
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format.pad = RWPF_PAD_SOURCE;
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ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, get_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev, "%s: got format %ux%u (%x) on WPF0 source\n",
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__func__, format.format.width, format.format.height,
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format.format.code);
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format.pad = LIF_PAD_SINK;
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ret = v4l2_subdev_call(&vsp1->lif->entity.subdev, pad, set_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on LIF sink\n",
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__func__, format.format.width, format.format.height,
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format.format.code);
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/* Verify that the format at the output of the pipeline matches the
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* requested frame size and media bus code.
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*/
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if (format.format.width != width || format.format.height != height ||
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format.format.code != MEDIA_BUS_FMT_ARGB8888_1X32) {
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dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__);
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return -EPIPE;
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}
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/* Mark the pipeline as streaming and enable the VSP1. This will store
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* the pipeline pointer in all entities, which the s_stream handlers
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* will need. We don't start the entities themselves right at this point
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* as there's no plane configured yet, so we can't start processing
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* buffers.
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*/
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ret = vsp1_device_get(vsp1);
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if (ret < 0)
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return ret;
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ret = media_entity_pipeline_start(&pipe->output->entity.subdev.entity,
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&pipe->pipe);
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if (ret < 0) {
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dev_dbg(vsp1->dev, "%s: pipeline start failed\n", __func__);
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vsp1_device_put(vsp1);
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return ret;
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}
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dev_dbg(vsp1->dev, "%s: pipeline enabled\n", __func__);
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return 0;
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}
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EXPORT_SYMBOL_GPL(vsp1_du_setup_lif);
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/**
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* vsp1_du_atomic_begin - Prepare for an atomic update
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* @dev: the VSP device
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*/
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void vsp1_du_atomic_begin(struct device *dev)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
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vsp1->drm->num_inputs = pipe->num_inputs;
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/* Prepare the display list. */
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pipe->dl = vsp1_dl_list_get(pipe->output->dlm);
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}
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EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin);
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/**
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* vsp1_du_atomic_update - Setup one RPF input of the VSP pipeline
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* @dev: the VSP device
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* @rpf_index: index of the RPF to setup (0-based)
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* @cfg: the RPF configuration
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*
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* Configure the VSP to perform image composition through RPF @rpf_index as
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* described by the @cfg configuration. The image to compose is referenced by
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* @cfg.mem and composed using the @cfg.src crop rectangle and the @cfg.dst
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* composition rectangle. The Z-order is configurable with higher @zpos values
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* displayed on top.
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*
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* If the @cfg configuration is NULL, the RPF will be disabled. Calling the
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* function on a disabled RPF is allowed.
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*
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* Image format as stored in memory is expressed as a V4L2 @cfg.pixelformat
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* value. The memory pitch is configurable to allow for padding at end of lines,
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* or simply for images that extend beyond the crop rectangle boundaries. The
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* @cfg.pitch value is expressed in bytes and applies to all planes for
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* multiplanar formats.
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*
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* The source memory buffer is referenced by the DMA address of its planes in
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* the @cfg.mem array. Up to two planes are supported. The second plane DMA
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* address is ignored for formats using a single plane.
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*
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* This function isn't reentrant, the caller needs to serialize calls.
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*
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* Return 0 on success or a negative error code on failure.
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*/
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int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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const struct vsp1_du_atomic_config *cfg)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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const struct vsp1_format_info *fmtinfo;
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struct vsp1_rwpf *rpf;
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if (rpf_index >= vsp1->info->rpf_count)
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return -EINVAL;
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rpf = vsp1->rpf[rpf_index];
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if (!cfg) {
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dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__,
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rpf_index);
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vsp1->drm->inputs[rpf_index].enabled = false;
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return 0;
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}
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dev_dbg(vsp1->dev,
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"%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad, %pad } zpos %u\n",
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__func__, rpf_index,
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cfg->src.left, cfg->src.top, cfg->src.width, cfg->src.height,
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cfg->dst.left, cfg->dst.top, cfg->dst.width, cfg->dst.height,
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cfg->pixelformat, cfg->pitch, &cfg->mem[0], &cfg->mem[1],
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&cfg->mem[2], cfg->zpos);
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/* Store the format, stride, memory buffer address, crop and compose
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* rectangles and Z-order position and for the input.
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*/
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fmtinfo = vsp1_get_format_info(cfg->pixelformat);
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if (!fmtinfo) {
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dev_dbg(vsp1->dev, "Unsupport pixel format %08x for RPF\n",
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cfg->pixelformat);
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return -EINVAL;
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}
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rpf->fmtinfo = fmtinfo;
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rpf->format.num_planes = fmtinfo->planes;
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rpf->format.plane_fmt[0].bytesperline = cfg->pitch;
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rpf->format.plane_fmt[1].bytesperline = cfg->pitch;
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rpf->alpha = cfg->alpha;
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rpf->mem.addr[0] = cfg->mem[0];
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rpf->mem.addr[1] = cfg->mem[1];
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rpf->mem.addr[2] = cfg->mem[2];
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vsp1->drm->inputs[rpf_index].crop = cfg->src;
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vsp1->drm->inputs[rpf_index].compose = cfg->dst;
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vsp1->drm->inputs[rpf_index].zpos = cfg->zpos;
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vsp1->drm->inputs[rpf_index].enabled = true;
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return 0;
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}
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EXPORT_SYMBOL_GPL(vsp1_du_atomic_update);
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static int vsp1_du_setup_rpf_pipe(struct vsp1_device *vsp1,
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struct vsp1_rwpf *rpf, unsigned int bru_input)
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{
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struct v4l2_subdev_selection sel;
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struct v4l2_subdev_format format;
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const struct v4l2_rect *crop;
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int ret;
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/* Configure the format on the RPF sink pad and propagate it up to the
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* BRU sink pad.
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*/
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crop = &vsp1->drm->inputs[rpf->entity.index].crop;
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memset(&format, 0, sizeof(format));
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format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
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format.pad = RWPF_PAD_SINK;
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format.format.width = crop->width + crop->left;
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format.format.height = crop->height + crop->top;
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format.format.code = rpf->fmtinfo->mbus;
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format.format.field = V4L2_FIELD_NONE;
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ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev,
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"%s: set format %ux%u (%x) on RPF%u sink\n",
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__func__, format.format.width, format.format.height,
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format.format.code, rpf->entity.index);
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memset(&sel, 0, sizeof(sel));
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sel.which = V4L2_SUBDEV_FORMAT_ACTIVE;
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sel.pad = RWPF_PAD_SINK;
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sel.target = V4L2_SEL_TGT_CROP;
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sel.r = *crop;
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ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_selection, NULL,
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&sel);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev,
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"%s: set selection (%u,%u)/%ux%u on RPF%u sink\n",
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__func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
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rpf->entity.index);
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/* RPF source, hardcode the format to ARGB8888 to turn on format
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* conversion if needed.
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*/
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format.pad = RWPF_PAD_SOURCE;
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ret = v4l2_subdev_call(&rpf->entity.subdev, pad, get_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev,
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"%s: got format %ux%u (%x) on RPF%u source\n",
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__func__, format.format.width, format.format.height,
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format.format.code, rpf->entity.index);
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format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
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ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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/* BRU sink, propagate the format from the RPF source. */
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format.pad = bru_input;
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ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_fmt, NULL,
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&format);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
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__func__, format.format.width, format.format.height,
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format.format.code, format.pad);
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sel.pad = bru_input;
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sel.target = V4L2_SEL_TGT_COMPOSE;
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sel.r = vsp1->drm->inputs[rpf->entity.index].compose;
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ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_selection,
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NULL, &sel);
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if (ret < 0)
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return ret;
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dev_dbg(vsp1->dev,
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"%s: set selection (%u,%u)/%ux%u on BRU pad %u\n",
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__func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
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sel.pad);
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return 0;
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}
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static unsigned int rpf_zpos(struct vsp1_device *vsp1, struct vsp1_rwpf *rpf)
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{
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return vsp1->drm->inputs[rpf->entity.index].zpos;
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}
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/**
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* vsp1_du_atomic_flush - Commit an atomic update
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* @dev: the VSP device
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*/
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void vsp1_du_atomic_flush(struct device *dev)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
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struct vsp1_rwpf *inputs[VSP1_MAX_RPF] = { NULL, };
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struct vsp1_entity *entity;
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unsigned long flags;
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unsigned int i;
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int ret;
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/* Count the number of enabled inputs and sort them by Z-order. */
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pipe->num_inputs = 0;
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for (i = 0; i < vsp1->info->rpf_count; ++i) {
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struct vsp1_rwpf *rpf = vsp1->rpf[i];
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unsigned int j;
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if (!vsp1->drm->inputs[i].enabled) {
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pipe->inputs[i] = NULL;
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continue;
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}
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pipe->inputs[i] = rpf;
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/* Insert the RPF in the sorted RPFs array. */
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for (j = pipe->num_inputs++; j > 0; --j) {
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if (rpf_zpos(vsp1, inputs[j-1]) <= rpf_zpos(vsp1, rpf))
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break;
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inputs[j] = inputs[j-1];
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}
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inputs[j] = rpf;
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}
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/* Setup the RPF input pipeline for every enabled input. */
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for (i = 0; i < vsp1->info->num_bru_inputs; ++i) {
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struct vsp1_rwpf *rpf = inputs[i];
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if (!rpf) {
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vsp1->bru->inputs[i].rpf = NULL;
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continue;
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}
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|
|
|
vsp1->bru->inputs[i].rpf = rpf;
|
|
rpf->bru_input = i;
|
|
rpf->entity.sink_pad = i;
|
|
|
|
dev_dbg(vsp1->dev, "%s: connecting RPF.%u to BRU:%u\n",
|
|
__func__, rpf->entity.index, i);
|
|
|
|
ret = vsp1_du_setup_rpf_pipe(vsp1, rpf, i);
|
|
if (ret < 0)
|
|
dev_err(vsp1->dev,
|
|
"%s: failed to setup RPF.%u\n",
|
|
__func__, rpf->entity.index);
|
|
}
|
|
|
|
/* Configure all entities in the pipeline. */
|
|
list_for_each_entry(entity, &pipe->entities, list_pipe) {
|
|
/* Disconnect unused RPFs from the pipeline. */
|
|
if (entity->type == VSP1_ENTITY_RPF) {
|
|
struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
|
|
|
|
if (!pipe->inputs[rpf->entity.index]) {
|
|
vsp1_dl_list_write(pipe->dl, entity->route->reg,
|
|
VI6_DPR_NODE_UNUSED);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
vsp1_entity_route_setup(entity, pipe->dl);
|
|
|
|
if (entity->ops->configure) {
|
|
entity->ops->configure(entity, pipe, pipe->dl,
|
|
VSP1_ENTITY_PARAMS_INIT);
|
|
entity->ops->configure(entity, pipe, pipe->dl,
|
|
VSP1_ENTITY_PARAMS_RUNTIME);
|
|
entity->ops->configure(entity, pipe, pipe->dl,
|
|
VSP1_ENTITY_PARAMS_PARTITION);
|
|
}
|
|
}
|
|
|
|
vsp1_dl_list_commit(pipe->dl);
|
|
pipe->dl = NULL;
|
|
|
|
/* Start or stop the pipeline if needed. */
|
|
if (!vsp1->drm->num_inputs && pipe->num_inputs) {
|
|
vsp1_write(vsp1, VI6_DISP_IRQ_STA, 0);
|
|
vsp1_write(vsp1, VI6_DISP_IRQ_ENB, VI6_DISP_IRQ_ENB_DSTE);
|
|
spin_lock_irqsave(&pipe->irqlock, flags);
|
|
vsp1_pipeline_run(pipe);
|
|
spin_unlock_irqrestore(&pipe->irqlock, flags);
|
|
} else if (vsp1->drm->num_inputs && !pipe->num_inputs) {
|
|
vsp1_write(vsp1, VI6_DISP_IRQ_ENB, 0);
|
|
vsp1_pipeline_stop(pipe);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(vsp1_du_atomic_flush);
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Initialization
|
|
*/
|
|
|
|
int vsp1_drm_create_links(struct vsp1_device *vsp1)
|
|
{
|
|
const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
/* VSPD instances require a BRU to perform composition and a LIF to
|
|
* output to the DU.
|
|
*/
|
|
if (!vsp1->bru || !vsp1->lif)
|
|
return -ENXIO;
|
|
|
|
for (i = 0; i < vsp1->info->rpf_count; ++i) {
|
|
struct vsp1_rwpf *rpf = vsp1->rpf[i];
|
|
|
|
ret = media_create_pad_link(&rpf->entity.subdev.entity,
|
|
RWPF_PAD_SOURCE,
|
|
&vsp1->bru->entity.subdev.entity,
|
|
i, flags);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
rpf->entity.sink = &vsp1->bru->entity.subdev.entity;
|
|
rpf->entity.sink_pad = i;
|
|
}
|
|
|
|
ret = media_create_pad_link(&vsp1->bru->entity.subdev.entity,
|
|
vsp1->bru->entity.source_pad,
|
|
&vsp1->wpf[0]->entity.subdev.entity,
|
|
RWPF_PAD_SINK, flags);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
vsp1->bru->entity.sink = &vsp1->wpf[0]->entity.subdev.entity;
|
|
vsp1->bru->entity.sink_pad = RWPF_PAD_SINK;
|
|
|
|
ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity,
|
|
RWPF_PAD_SOURCE,
|
|
&vsp1->lif->entity.subdev.entity,
|
|
LIF_PAD_SINK, flags);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int vsp1_drm_init(struct vsp1_device *vsp1)
|
|
{
|
|
struct vsp1_pipeline *pipe;
|
|
unsigned int i;
|
|
|
|
vsp1->drm = devm_kzalloc(vsp1->dev, sizeof(*vsp1->drm), GFP_KERNEL);
|
|
if (!vsp1->drm)
|
|
return -ENOMEM;
|
|
|
|
pipe = &vsp1->drm->pipe;
|
|
|
|
vsp1_pipeline_init(pipe);
|
|
|
|
/* The DRM pipeline is static, add entities manually. */
|
|
for (i = 0; i < vsp1->info->rpf_count; ++i) {
|
|
struct vsp1_rwpf *input = vsp1->rpf[i];
|
|
|
|
list_add_tail(&input->entity.list_pipe, &pipe->entities);
|
|
}
|
|
|
|
list_add_tail(&vsp1->bru->entity.list_pipe, &pipe->entities);
|
|
list_add_tail(&vsp1->wpf[0]->entity.list_pipe, &pipe->entities);
|
|
list_add_tail(&vsp1->lif->entity.list_pipe, &pipe->entities);
|
|
|
|
pipe->bru = &vsp1->bru->entity;
|
|
pipe->lif = &vsp1->lif->entity;
|
|
pipe->output = vsp1->wpf[0];
|
|
|
|
return 0;
|
|
}
|
|
|
|
void vsp1_drm_cleanup(struct vsp1_device *vsp1)
|
|
{
|
|
}
|