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![Linus Torvalds](/assets/img/avatar_default.png)
- Support for EZChip (now Mellanox) NPS-400 Network processor based on ARC700 http://www.mellanox.com/related-docs/prod_npu/PB_NPS-400.pdf - NPS interrupt controller and clocksource drivers - ARC timers probed off DT - ARC iqrchips switching to linear domain (upgrade from legacy domains) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXPVjYAAoJEGnX8d3iisJeMJQP/2fBHUqCVjxYMaU0XSy/rFiu XItBxYfDHw+pXILgwZ1XPy0CNUxNhGmIG+0Scy+Uw9bDa64Eulked6QVsLlosOky 2rbmDAZf2/fnwFhASg9eY2Xm5B2jFvStzmTkOgAkGko5cCwF7WWZJhLiziSICvK/ l7I5yr0SSpn9xGbazeIxyqw16e4QuY+uCKXF12AoGOi+efpe1L7vrbu9WKELWQfJ NreZjxC16je944POnE4hw4F11Tg+uvhgQAAlmFCUswIZwtnTjttrmMyflop86H3S cItT1UV/ps24lD2ZZVIlI6Gdc/iKB0FSq7XTpTOAVI/ku5x2tWGmRb8aM5pxmCkX r44dXW89P9JFhthWKS79FwXgwxIMMN3CniO+g4YnrpI23iu6O+kXGoQejwsE1NZ0 99+gXcUvEL1E5GZ7JfAdIvU741Y+y06fgXBs8Z+BGKzUNN5bI3PtuPeVNQwC38J7 lY8UegRW/elmiNiOilz+QZ5sGX/QVnN68UQNkBYHZRom/3vpzcMMZpTu5xgw5XqQ CnCd0lD0tWICyiq6BXeNACBgQ6RX+KY9EECpVt05CTw5IxZQyGMAJwNqIuLw3Id3 j42IiJ3PHH1yS+TeWOYf2mEvXj8vyiQK6fssy6xZ0bPqRKaEqwAKeDEW2St9N9B4 0PhS1VwvL5RXsZx79/6e =pnAx -----END PGP SIGNATURE----- Merge tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC updates from Vineet Gupta: "We have a relatively big changeset for ARC for 4.7. The highlight is support for EZChip (now Mellanox) NPS-400 network processor, a 400-Gb throughput C-programmable packet processor based on ARC700 cores from Synopsys. See http://www.mellanox.com/related-docs/prod_npu/PB_NPS-400.pdf Also present are irqchip and clocksource drivers for NPS as agreed with respective maintainers to go via ARC tree due to an soc header dependency. I have the needed ACKs from Jason, Marc, Daniel. You might run into a trivial merge conflict in drivers/irqchip/* This EZChip platform support required some deep changes in ARC architecture code and also opportunity to cleanup past sins (legacy irq domains, missing irq domain lookup, hard coded timer irqs...) Summary: - Support for EZChip (now Mellanox) NPS-400 Network processor based on ARC700 - NPS interrupt controller and clocksource drivers - ARC timers probed off DT - ARC iqrchips switching to linear domain (upgrade from legacy domains)" * tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (37 commits) arc: axs103_smp: Fix CPU frequency to 100MHz for dual-core arc: axs10x: Add DT bindings for I2S PLL Clock ARC: pae: STRICT_MM_TYPECHECKS was broken ARC: Add eznps platform to Kconfig and Makefile ARC: [plat-eznps] Use dedicated COMMAND_LINE_SIZE ARC: [plat-eznps] Use dedicated cpu_relax() ARC: [plat-eznps] Use dedicated identity auxiliary register. ARC: [plat-eznps] Use dedicated SMP barriers ARC: [plat-eznps] Use dedicated atomic/bitops/cmpxchg ARC: [plat-eznps] Use dedicated user stack top ARC: [plat-eznps] Add eznps platform ARC: [plat-eznps] Add eznps board defconfig and dts ARC: Mark secondary cpu online only after all HW setup is done ARC: rwlock: disable interrupts in !LLSC variant ARC: Make vmalloc size configurable ARC: clean out UAPI byteorder.h clean off Kconfig symbol irqchip: add nps Internal and external irqchips clocksource: Add NPS400 timers driver soc: Support for EZchip SoC Documentation: Add EZchip vendor to binding list ...
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menu "Clock Source drivers"
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depends on !ARCH_USES_GETTIMEOFFSET
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config CLKSRC_OF
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bool
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select CLKSRC_PROBE
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config CLKSRC_ACPI
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bool
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select CLKSRC_PROBE
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config CLKSRC_PROBE
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bool
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config CLKSRC_I8253
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bool
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config CLKEVT_I8253
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bool
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config I8253_LOCK
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bool
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config CLKBLD_I8253
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def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
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config CLKSRC_MMIO
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bool
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config DIGICOLOR_TIMER
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bool "Digicolor timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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select CLKSRC_MMIO
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depends on HAS_IOMEM
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help
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Enables the support for the digicolor timer driver.
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config DW_APB_TIMER
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bool "DW APB timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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help
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Enables the support for the dw_apb timer.
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config DW_APB_TIMER_OF
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bool
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select DW_APB_TIMER
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select CLKSRC_OF
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config ROCKCHIP_TIMER
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bool "Rockchip timer driver" if COMPILE_TEST
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depends on ARM || ARM64
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select CLKSRC_OF
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help
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Enables the support for the rockchip timer driver.
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config ARMADA_370_XP_TIMER
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bool "Armada 370 and XP timer driver" if COMPILE_TEST
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depends on ARM
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select CLKSRC_OF
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select CLKSRC_MMIO
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help
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Enables the support for the Armada 370 and XP timer driver.
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config MESON6_TIMER
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bool "Meson6 timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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select CLKSRC_MMIO
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help
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Enables the support for the Meson6 timer driver.
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config ORION_TIMER
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bool "Orion timer driver" if COMPILE_TEST
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depends on ARM
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select CLKSRC_OF
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select CLKSRC_MMIO
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help
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Enables the support for the Orion timer driver
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config SUN4I_TIMER
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bool "Sun4i timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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select CLKSRC_MMIO
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help
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Enables support for the Sun4i timer.
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config SUN5I_HSTIMER
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bool "Sun5i timer driver" if COMPILE_TEST
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select CLKSRC_MMIO
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depends on COMMON_CLK
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help
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Enables support the Sun5i timer.
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config TEGRA_TIMER
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bool "Tegra timer driver" if COMPILE_TEST
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select CLKSRC_MMIO
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depends on ARM
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help
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Enables support for the Tegra driver.
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config VT8500_TIMER
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bool "VT8500 timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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help
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Enables support for the VT8500 driver.
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config CADENCE_TTC_TIMER
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bool "Cadence TTC timer driver" if COMPILE_TEST
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depends on COMMON_CLK
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help
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Enables support for the cadence ttc driver.
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config ASM9260_TIMER
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bool "ASM9260 timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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select CLKSRC_MMIO
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select CLKSRC_OF
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help
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Enables support for the ASM9260 timer.
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config CLKSRC_NOMADIK_MTU
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bool "Nomakdik clocksource driver" if COMPILE_TEST
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depends on ARM
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select CLKSRC_MMIO
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help
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Support for Multi Timer Unit. MTU provides access
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to multiple interrupt generating programmable
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32-bit free running decrementing counters.
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config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
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bool
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depends on CLKSRC_NOMADIK_MTU
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help
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Use the Multi Timer Unit as the sched_clock.
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config CLKSRC_DBX500_PRCMU
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bool "Clocksource PRCMU Timer" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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help
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Use the always on PRCMU Timer as clocksource
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config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
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bool "Clocksource PRCMU Timer sched_clock"
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depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
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default y
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help
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Use the always on PRCMU Timer as sched_clock
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config CLKSRC_EFM32
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bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
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depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
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select CLKSRC_MMIO
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default ARCH_EFM32
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help
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Support to use the timers of EFM32 SoCs as clock source and clock
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event device.
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config CLKSRC_LPC32XX
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bool "Clocksource for LPC32XX" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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depends on ARM
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select CLKSRC_MMIO
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select CLKSRC_OF
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help
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Support for the LPC32XX clocksource.
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config CLKSRC_PISTACHIO
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bool "Clocksource for Pistachio SoC" if COMPILE_TEST
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depends on HAS_IOMEM
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select CLKSRC_OF
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help
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Enables the clocksource for the Pistachio SoC.
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config CLKSRC_TI_32K
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bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
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depends on GENERIC_SCHED_CLOCK
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select CLKSRC_OF if OF
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help
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This option enables support for Texas Instruments 32.768 Hz clocksource
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available on many OMAP-like platforms.
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config CLKSRC_NPS
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bool "NPS400 clocksource driver" if COMPILE_TEST
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depends on !PHYS_ADDR_T_64BIT
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select CLKSRC_MMIO
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select CLKSRC_OF if OF
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help
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NPS400 clocksource support.
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Got 64 bit counter with update rate up to 1000MHz.
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This counter is accessed via couple of 32 bit memory mapped registers.
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config CLKSRC_STM32
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bool "Clocksource for STM32 SoCs" if !ARCH_STM32
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depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
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select CLKSRC_MMIO
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config CLKSRC_MPS2
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bool "Clocksource for MPS2 SoCs" if COMPILE_TEST
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depends on GENERIC_SCHED_CLOCK
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select CLKSRC_MMIO
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select CLKSRC_OF
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config ARM_ARCH_TIMER
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bool
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select CLKSRC_OF if OF
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select CLKSRC_ACPI if ACPI
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config ARM_ARCH_TIMER_EVTSTREAM
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bool "Support for ARM architected timer event stream generation"
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default y if ARM_ARCH_TIMER
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depends on ARM_ARCH_TIMER
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help
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This option enables support for event stream generation based on
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the ARM architected timer. It is used for waking up CPUs executing
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the wfe instruction at a frequency represented as a power-of-2
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divisor of the clock rate.
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The main use of the event stream is wfe-based timeouts of userspace
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locking implementations. It might also be useful for imposing timeout
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on wfe to safeguard against any programming errors in case an expected
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event is not generated.
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This must be disabled for hardware validation purposes to detect any
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hardware anomalies of missing events.
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config ARM_GLOBAL_TIMER
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bool
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select CLKSRC_OF if OF
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help
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This options enables support for the ARM global timer unit
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config ARM_TIMER_SP804
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bool "Support for Dual Timer SP804 module"
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depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_OF if OF
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config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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bool
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depends on ARM_GLOBAL_TIMER
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default y
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help
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Use ARM global timer clock source as sched_clock
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config ARMV7M_SYSTICK
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bool
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select CLKSRC_OF if OF
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select CLKSRC_MMIO
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help
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This options enables support for the ARMv7M system timer unit
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config ATMEL_PIT
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select CLKSRC_OF if OF
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def_bool SOC_AT91SAM9 || SOC_SAMA5
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config ATMEL_ST
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bool
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select CLKSRC_OF
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select MFD_SYSCON
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config CLKSRC_METAG_GENERIC
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def_bool y if METAG
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help
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This option enables support for the Meta per-thread timers.
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config CLKSRC_EXYNOS_MCT
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bool "Exynos multi core timer driver" if COMPILE_TEST
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depends on ARM
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help
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Support for Multi Core Timer controller on Exynos SoCs.
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config CLKSRC_SAMSUNG_PWM
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bool "PWM timer drvier for Samsung S3C, S5P" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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help
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This is a new clocksource driver for the PWM timer found in
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Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
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for all devicetree enabled platforms. This driver will be
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needed only on systems that do not have the Exynos MCT available.
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config FSL_FTM_TIMER
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bool "Freescale FlexTimer Module driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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select CLKSRC_MMIO
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help
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Support for Freescale FlexTimer Module (FTM) timer.
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config VF_PIT_TIMER
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bool
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select CLKSRC_MMIO
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help
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Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
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config SYS_SUPPORTS_SH_CMT
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bool
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config MTK_TIMER
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bool "Mediatek timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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select CLKSRC_OF
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select CLKSRC_MMIO
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help
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Support for Mediatek timer driver.
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config SYS_SUPPORTS_SH_MTU2
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bool
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config SYS_SUPPORTS_SH_TMU
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bool
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config SYS_SUPPORTS_EM_STI
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bool
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config SH_TIMER_CMT
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bool "Renesas CMT timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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default SYS_SUPPORTS_SH_CMT
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help
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This enables build of a clocksource and clockevent driver for
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the Compare Match Timer (CMT) hardware available in 16/32/48-bit
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variants on a wide range of Mobile and Automotive SoCs from Renesas.
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config SH_TIMER_MTU2
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bool "Renesas MTU2 timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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default SYS_SUPPORTS_SH_MTU2
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help
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This enables build of a clockevent driver for the Multi-Function
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Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
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This hardware comes with 16 bit-timer registers.
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config SH_TIMER_TMU
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bool "Renesas TMU timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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default SYS_SUPPORTS_SH_TMU
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help
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This enables build of a clocksource and clockevent driver for
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the 32-bit Timer Unit (TMU) hardware available on a wide range
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SoCs from Renesas.
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config EM_TIMER_STI
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bool "Renesas STI timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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default SYS_SUPPORTS_EM_STI
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help
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This enables build of a clocksource and clockevent driver for
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the 48-bit System Timer (STI) hardware available on a SoCs
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such as EMEV2 from former NEC Electronics.
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config CLKSRC_QCOM
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bool "Qualcomm MSM timer" if COMPILE_TEST
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depends on ARM
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select CLKSRC_OF
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help
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This enables the clocksource and the per CPU clockevent driver for the
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Qualcomm SoCs.
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config CLKSRC_VERSATILE
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bool "ARM Versatile (Express) reference platforms clock source"
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depends on PLAT_VERSATILE && GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
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select CLKSRC_OF
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default y if MFD_VEXPRESS_SYSREG
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help
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This option enables clock source based on free running
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counter available in the "System Registers" block of
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ARM Versatile, RealView and Versatile Express reference
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platforms.
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config CLKSRC_MIPS_GIC
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bool
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depends on MIPS_GIC
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select CLKSRC_OF
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config CLKSRC_TANGO_XTAL
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bool "Clocksource for Tango SoC" if COMPILE_TEST
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depends on ARM
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select CLKSRC_OF
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select CLKSRC_MMIO
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help
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This enables the clocksource for Tango SoC
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config CLKSRC_PXA
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bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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depends on HAS_IOMEM
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select CLKSRC_MMIO
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help
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This enables OST0 support available on PXA and SA-11x0
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platforms.
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config H8300_TMR8
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bool "Clockevent timer for the H8300 platform" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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help
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This enables the 8 bits timer for the H8300 platform.
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config H8300_TMR16
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bool "Clockevent timer for the H83069 platform" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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help
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This enables the 16 bits timer for the H8300 platform with the
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H83069 cpu.
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config H8300_TPU
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bool "Clocksource for the H8300 platform" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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help
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This enables the clocksource for the H8300 platform with the
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H8S2678 cpu.
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config CLKSRC_IMX_GPT
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bool "Clocksource using i.MX GPT" if COMPILE_TEST
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depends on ARM && CLKDEV_LOOKUP
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select CLKSRC_MMIO
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config CLKSRC_ST_LPC
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bool "Low power clocksource found in the LPC" if COMPILE_TEST
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select CLKSRC_OF if OF
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depends on HAS_IOMEM
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select CLKSRC_MMIO
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help
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Enable this option to use the Low Power controller timer
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as clocksource.
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endmenu
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