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![Andrew Jeffery](/assets/img/avatar_default.png)
A small subset of pins and functions are exposed. The selection of pins and functions is driven by the development of OpenBMC[1] on the AST2500 SoC, particularly around booting the IBM Witherspoon platform. [1] https://github.com/openbmc/docs Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
24 lines
710 B
Text
24 lines
710 B
Text
config PINCTRL_ASPEED
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bool
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depends on (ARCH_ASPEED || COMPILE_TEST) && OF
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depends on MFD_SYSCON
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select REGMAP_MMIO
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config PINCTRL_ASPEED_G4
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bool "Aspeed G4 SoC pin control"
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depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 4th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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config PINCTRL_ASPEED_G5
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bool "Aspeed G5 SoC pin control"
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depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 5th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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