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05aaa7fdb0
Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195. Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230307154524.118541-2-bchihi@baylibre.com
29 lines
760 B
C
29 lines
760 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2023 MediaTek Inc.
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* Author: Balsam CHIHI <bchihi@baylibre.com>
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*/
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#ifndef __MEDIATEK_LVTS_DT_H
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#define __MEDIATEK_LVTS_DT_H
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#define MT8195_MCU_BIG_CPU0 0
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#define MT8195_MCU_BIG_CPU1 1
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#define MT8195_MCU_BIG_CPU2 2
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#define MT8195_MCU_BIG_CPU3 3
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#define MT8195_MCU_LITTLE_CPU0 4
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#define MT8195_MCU_LITTLE_CPU1 5
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#define MT8195_MCU_LITTLE_CPU2 6
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#define MT8195_MCU_LITTLE_CPU3 7
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#define MT8195_AP_VPU0 8
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#define MT8195_AP_VPU1 9
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#define MT8195_AP_GPU0 10
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#define MT8195_AP_GPU1 11
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#define MT8195_AP_VDEC 12
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#define MT8195_AP_IMG 13
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#define MT8195_AP_INFRA 14
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#define MT8195_AP_CAM0 15
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#define MT8195_AP_CAM1 16
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#endif /* __MEDIATEK_LVTS_DT_H */
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