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![Corentin Labbe](/assets/img/avatar_default.png)
The usage of of_device_get_match_data reduce the code size a bit. Furthermore, it prevents an improbable dereference when of_match_device() return NULL. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
725 lines
19 KiB
C
725 lines
19 KiB
C
/* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
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*
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* Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*
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* The Allwinner SoCs all have an ADC that can also act as a touchscreen
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* controller and a thermal sensor.
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* The thermal sensor works only when the ADC acts as a touchscreen controller
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* and is configured to throw an interrupt every fixed periods of time (let say
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* every X seconds).
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* One would be tempted to disable the IP on the hardware side rather than
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* disabling interrupts to save some power but that resets the internal clock of
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* the IP, resulting in having to wait X seconds every time we want to read the
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* value of the thermal sensor.
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* This is also the reason of using autosuspend in pm_runtime. If there was no
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* autosuspend, the thermal sensor would need X seconds after every
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* pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
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* thermal sensor to be requested again in a certain time span before it gets
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* shutdown for not being used.
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*/
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#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/thermal.h>
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#include <linux/delay.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/driver.h>
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#include <linux/iio/machine.h>
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#include <linux/mfd/sun4i-gpadc.h>
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static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
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{
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return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
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}
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static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
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{
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return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
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}
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struct gpadc_data {
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int temp_offset;
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int temp_scale;
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unsigned int tp_mode_en;
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unsigned int tp_adc_select;
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unsigned int (*adc_chan_select)(unsigned int chan);
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unsigned int adc_chan_mask;
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};
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static const struct gpadc_data sun4i_gpadc_data = {
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.temp_offset = -1932,
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.temp_scale = 133,
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.tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
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.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
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.adc_chan_select = &sun4i_gpadc_chan_select,
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.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
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};
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static const struct gpadc_data sun5i_gpadc_data = {
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.temp_offset = -1447,
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.temp_scale = 100,
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.tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
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.tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
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.adc_chan_select = &sun4i_gpadc_chan_select,
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.adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
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};
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static const struct gpadc_data sun6i_gpadc_data = {
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.temp_offset = -1623,
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.temp_scale = 167,
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.tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
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.tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
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.adc_chan_select = &sun6i_gpadc_chan_select,
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.adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
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};
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static const struct gpadc_data sun8i_a33_gpadc_data = {
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.temp_offset = -1662,
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.temp_scale = 162,
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.tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
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};
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struct sun4i_gpadc_iio {
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struct iio_dev *indio_dev;
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struct completion completion;
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int temp_data;
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u32 adc_data;
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struct regmap *regmap;
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unsigned int fifo_data_irq;
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atomic_t ignore_fifo_data_irq;
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unsigned int temp_data_irq;
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atomic_t ignore_temp_data_irq;
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const struct gpadc_data *data;
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bool no_irq;
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/* prevents concurrent reads of temperature and ADC */
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struct mutex mutex;
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struct thermal_zone_device *tzd;
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struct device *sensor_device;
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};
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#define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = _channel, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.datasheet_name = _name, \
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}
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static struct iio_map sun4i_gpadc_hwmon_maps[] = {
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{
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.adc_channel_label = "temp_adc",
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.consumer_dev_name = "iio_hwmon.0",
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},
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{ /* sentinel */ },
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};
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static const struct iio_chan_spec sun4i_gpadc_channels[] = {
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SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
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SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
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SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
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SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
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{
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.type = IIO_TEMP,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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.datasheet_name = "temp_adc",
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},
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};
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static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
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SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
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SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
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SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
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SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
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};
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static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
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{
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.type = IIO_TEMP,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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.datasheet_name = "temp_adc",
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},
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};
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static const struct regmap_config sun4i_gpadc_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.fast_io = true,
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};
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static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
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unsigned int irq)
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{
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struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
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int ret;
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u32 reg;
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pm_runtime_get_sync(indio_dev->dev.parent);
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reinit_completion(&info->completion);
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ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
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SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
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SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
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if (ret)
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return ret;
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ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, ®);
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if (ret)
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return ret;
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if (irq == info->fifo_data_irq) {
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ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
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info->data->tp_mode_en |
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info->data->tp_adc_select |
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info->data->adc_chan_select(channel));
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/*
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* When the IP changes channel, it needs a bit of time to get
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* correct values.
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*/
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if ((reg & info->data->adc_chan_mask) !=
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info->data->adc_chan_select(channel))
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mdelay(10);
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} else {
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/*
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* The temperature sensor returns valid data only when the ADC
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* operates in touchscreen mode.
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*/
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ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
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info->data->tp_mode_en);
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}
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if (ret)
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return ret;
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/*
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* When the IP changes mode between ADC or touchscreen, it
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* needs a bit of time to get correct values.
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*/
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if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
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mdelay(100);
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return 0;
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}
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static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
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unsigned int irq)
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{
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struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
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int ret;
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mutex_lock(&info->mutex);
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ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
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if (ret)
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goto err;
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enable_irq(irq);
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/*
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* The temperature sensor throws an interruption periodically (currently
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* set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
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* makes sure an interruption occurs in normal conditions. If it doesn't
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* occur, then there is a timeout.
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*/
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if (!wait_for_completion_timeout(&info->completion,
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msecs_to_jiffies(1000))) {
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ret = -ETIMEDOUT;
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goto err;
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}
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if (irq == info->fifo_data_irq)
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*val = info->adc_data;
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else
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*val = info->temp_data;
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ret = 0;
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pm_runtime_mark_last_busy(indio_dev->dev.parent);
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err:
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pm_runtime_put_autosuspend(indio_dev->dev.parent);
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disable_irq(irq);
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mutex_unlock(&info->mutex);
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return ret;
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}
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static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
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int *val)
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{
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struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
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return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
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}
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static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
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{
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struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
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if (info->no_irq) {
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pm_runtime_get_sync(indio_dev->dev.parent);
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regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
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pm_runtime_mark_last_busy(indio_dev->dev.parent);
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pm_runtime_put_autosuspend(indio_dev->dev.parent);
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return 0;
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}
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return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
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}
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static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
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{
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struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
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*val = info->data->temp_offset;
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return 0;
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}
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static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
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{
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struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
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*val = info->data->temp_scale;
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return 0;
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}
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static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val,
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int *val2, long mask)
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{
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_OFFSET:
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ret = sun4i_gpadc_temp_offset(indio_dev, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_RAW:
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if (chan->type == IIO_VOLTAGE)
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ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
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val);
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else
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ret = sun4i_gpadc_temp_read(indio_dev, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (chan->type == IIO_VOLTAGE) {
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/* 3000mV / 4096 * raw */
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*val = 0;
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*val2 = 732421875;
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return IIO_VAL_INT_PLUS_NANO;
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}
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ret = sun4i_gpadc_temp_scale(indio_dev, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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return -EINVAL;
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}
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static const struct iio_info sun4i_gpadc_iio_info = {
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.read_raw = sun4i_gpadc_read_raw,
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};
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static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
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{
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struct sun4i_gpadc_iio *info = dev_id;
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if (atomic_read(&info->ignore_temp_data_irq))
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goto out;
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if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
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complete(&info->completion);
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out:
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return IRQ_HANDLED;
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}
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static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
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{
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struct sun4i_gpadc_iio *info = dev_id;
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if (atomic_read(&info->ignore_fifo_data_irq))
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goto out;
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if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
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complete(&info->completion);
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out:
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return IRQ_HANDLED;
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}
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static int sun4i_gpadc_runtime_suspend(struct device *dev)
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{
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struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
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/* Disable the ADC on IP */
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regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
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/* Disable temperature sensor on IP */
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regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
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return 0;
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}
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static int sun4i_gpadc_runtime_resume(struct device *dev)
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{
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struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
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/* clkin = 6MHz */
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regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
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SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
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SUN4I_GPADC_CTRL0_FS_DIV(7) |
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SUN4I_GPADC_CTRL0_T_ACQ(63));
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regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
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regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
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SUN4I_GPADC_CTRL3_FILTER_EN |
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SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
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/* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
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regmap_write(info->regmap, SUN4I_GPADC_TPR,
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SUN4I_GPADC_TPR_TEMP_ENABLE |
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SUN4I_GPADC_TPR_TEMP_PERIOD(800));
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return 0;
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}
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static int sun4i_gpadc_get_temp(void *data, int *temp)
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{
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struct sun4i_gpadc_iio *info = data;
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int val, scale, offset;
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if (sun4i_gpadc_temp_read(info->indio_dev, &val))
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return -ETIMEDOUT;
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sun4i_gpadc_temp_scale(info->indio_dev, &scale);
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sun4i_gpadc_temp_offset(info->indio_dev, &offset);
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*temp = (val + offset) * scale;
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return 0;
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}
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static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
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.get_temp = &sun4i_gpadc_get_temp,
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};
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static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
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.runtime_suspend = &sun4i_gpadc_runtime_suspend,
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.runtime_resume = &sun4i_gpadc_runtime_resume,
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};
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static int sun4i_irq_init(struct platform_device *pdev, const char *name,
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irq_handler_t handler, const char *devname,
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unsigned int *irq, atomic_t *atomic)
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{
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int ret;
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struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
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struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
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/*
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* Once the interrupt is activated, the IP continuously performs
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* conversions thus throws interrupts. The interrupt is activated right
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* after being requested but we want to control when these interrupts
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* occur thus we disable it right after being requested. However, an
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* interrupt might occur between these two instructions and we have to
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* make sure that does not happen, by using atomic flags. We set the
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* flag before requesting the interrupt and unset it right after
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* disabling the interrupt. When an interrupt occurs between these two
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* instructions, reading the atomic flag will tell us to ignore the
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* interrupt.
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*/
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atomic_set(atomic, 1);
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ret = platform_get_irq_byname(pdev, name);
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if (ret < 0) {
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|
dev_err(&pdev->dev, "no %s interrupt registered\n", name);
|
|
return ret;
|
|
}
|
|
|
|
ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
|
|
return ret;
|
|
}
|
|
|
|
*irq = ret;
|
|
ret = devm_request_any_context_irq(&pdev->dev, *irq, handler, 0,
|
|
devname, info);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
|
|
name, ret);
|
|
return ret;
|
|
}
|
|
|
|
disable_irq(*irq);
|
|
atomic_set(atomic, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id sun4i_gpadc_of_id[] = {
|
|
{
|
|
.compatible = "allwinner,sun8i-a33-ths",
|
|
.data = &sun8i_a33_gpadc_data,
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
|
|
struct iio_dev *indio_dev)
|
|
{
|
|
struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
|
|
struct resource *mem;
|
|
void __iomem *base;
|
|
int ret;
|
|
|
|
info->data = of_device_get_match_data(&pdev->dev);
|
|
if (!info->data)
|
|
return -ENODEV;
|
|
|
|
info->no_irq = true;
|
|
indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
|
|
indio_dev->channels = sun8i_a33_gpadc_channels;
|
|
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
base = devm_ioremap_resource(&pdev->dev, mem);
|
|
if (IS_ERR(base))
|
|
return PTR_ERR(base);
|
|
|
|
info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
|
|
&sun4i_gpadc_regmap_config);
|
|
if (IS_ERR(info->regmap)) {
|
|
ret = PTR_ERR(info->regmap);
|
|
dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
if (IS_ENABLED(CONFIG_THERMAL_OF))
|
|
info->sensor_device = &pdev->dev;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
|
|
struct iio_dev *indio_dev)
|
|
{
|
|
struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
|
|
struct sun4i_gpadc_dev *sun4i_gpadc_dev =
|
|
dev_get_drvdata(pdev->dev.parent);
|
|
int ret;
|
|
|
|
info->no_irq = false;
|
|
info->regmap = sun4i_gpadc_dev->regmap;
|
|
|
|
indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
|
|
indio_dev->channels = sun4i_gpadc_channels;
|
|
|
|
info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
|
|
|
|
/*
|
|
* Since the controller needs to be in touchscreen mode for its thermal
|
|
* sensor to operate properly, and that switching between the two modes
|
|
* needs a delay, always registering in the thermal framework will
|
|
* significantly slow down the conversion rate of the ADCs.
|
|
*
|
|
* Therefore, instead of depending on THERMAL_OF in Kconfig, we only
|
|
* register the sensor if that option is enabled, eventually leaving
|
|
* that choice to the user.
|
|
*/
|
|
|
|
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
|
|
/*
|
|
* This driver is a child of an MFD which has a node in the DT
|
|
* but not its children, because of DT backward compatibility
|
|
* for A10, A13 and A31 SoCs. Therefore, the resulting devices
|
|
* of this driver do not have an of_node variable.
|
|
* However, its parent (the MFD driver) has an of_node variable
|
|
* and since devm_thermal_zone_of_sensor_register uses its first
|
|
* argument to match the phandle defined in the node of the
|
|
* thermal driver with the of_node of the device passed as first
|
|
* argument and the third argument to call ops from
|
|
* thermal_zone_of_device_ops, the solution is to use the parent
|
|
* device as first argument to match the phandle with its
|
|
* of_node, and the device from this driver as third argument to
|
|
* return the temperature.
|
|
*/
|
|
info->sensor_device = pdev->dev.parent;
|
|
} else {
|
|
indio_dev->num_channels =
|
|
ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
|
|
indio_dev->channels = sun4i_gpadc_channels_no_temp;
|
|
}
|
|
|
|
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
|
|
ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
|
|
sun4i_gpadc_temp_data_irq_handler,
|
|
"temp_data", &info->temp_data_irq,
|
|
&info->ignore_temp_data_irq);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
|
|
sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
|
|
&info->fifo_data_irq, &info->ignore_fifo_data_irq);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
|
|
ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev,
|
|
"failed to register iio map array\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sun4i_gpadc_probe(struct platform_device *pdev)
|
|
{
|
|
struct sun4i_gpadc_iio *info;
|
|
struct iio_dev *indio_dev;
|
|
int ret;
|
|
|
|
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
info = iio_priv(indio_dev);
|
|
platform_set_drvdata(pdev, indio_dev);
|
|
|
|
mutex_init(&info->mutex);
|
|
info->indio_dev = indio_dev;
|
|
init_completion(&info->completion);
|
|
indio_dev->name = dev_name(&pdev->dev);
|
|
indio_dev->dev.parent = &pdev->dev;
|
|
indio_dev->dev.of_node = pdev->dev.of_node;
|
|
indio_dev->info = &sun4i_gpadc_iio_info;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
if (pdev->dev.of_node)
|
|
ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
|
|
else
|
|
ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
|
|
|
|
if (ret)
|
|
return ret;
|
|
|
|
pm_runtime_set_autosuspend_delay(&pdev->dev,
|
|
SUN4I_GPADC_AUTOSUSPEND_DELAY);
|
|
pm_runtime_use_autosuspend(&pdev->dev);
|
|
pm_runtime_set_suspended(&pdev->dev);
|
|
pm_runtime_enable(&pdev->dev);
|
|
|
|
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
|
|
info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
|
|
0, info,
|
|
&sun4i_ts_tz_ops);
|
|
/*
|
|
* Do not fail driver probing when failing to register in
|
|
* thermal because no thermal DT node is found.
|
|
*/
|
|
if (IS_ERR(info->tzd) && PTR_ERR(info->tzd) != -ENODEV) {
|
|
dev_err(&pdev->dev,
|
|
"could not register thermal sensor: %ld\n",
|
|
PTR_ERR(info->tzd));
|
|
return PTR_ERR(info->tzd);
|
|
}
|
|
}
|
|
|
|
ret = devm_iio_device_register(&pdev->dev, indio_dev);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "could not register the device\n");
|
|
goto err_map;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_map:
|
|
if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
|
|
iio_map_array_unregister(indio_dev);
|
|
|
|
pm_runtime_put(&pdev->dev);
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int sun4i_gpadc_remove(struct platform_device *pdev)
|
|
{
|
|
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
|
|
struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
|
|
|
|
pm_runtime_put(&pdev->dev);
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
if (!IS_ENABLED(CONFIG_THERMAL_OF))
|
|
return 0;
|
|
|
|
thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
|
|
|
|
if (!info->no_irq)
|
|
iio_map_array_unregister(indio_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct platform_device_id sun4i_gpadc_id[] = {
|
|
{ "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
|
|
{ "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
|
|
{ "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
|
|
{ /* sentinel */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
|
|
|
|
static struct platform_driver sun4i_gpadc_driver = {
|
|
.driver = {
|
|
.name = "sun4i-gpadc-iio",
|
|
.of_match_table = sun4i_gpadc_of_id,
|
|
.pm = &sun4i_gpadc_pm_ops,
|
|
},
|
|
.id_table = sun4i_gpadc_id,
|
|
.probe = sun4i_gpadc_probe,
|
|
.remove = sun4i_gpadc_remove,
|
|
};
|
|
MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
|
|
|
|
module_platform_driver(sun4i_gpadc_driver);
|
|
|
|
MODULE_DESCRIPTION("ADC driver for sunxi platforms");
|
|
MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
|
|
MODULE_LICENSE("GPL v2");
|