Shaokun Zhang 5de587fd84 drivers/perf: hisi: Fix wrong value for all counters enable ... [ Upstream commit 961abd78ad ] In L3C uncore PMU drivers, bit16 is used to control all counters enable & disable. Wrong value is given in the driver and its default value is 1'b1, it can work because each PMU counter has its own control bits too. Let's fix the wrong value. Fixes: 2940bc4333 ("perf: hisi: Add support for HiSilicon SoC L3C PMU driver") Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/1591350221-32275-1-git-send-email-zhangshaokun@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2020-06-25 15:33:04 +02:00
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hisilicon	drivers/perf: hisi: Fix wrong value for all counters enable	2020-06-25 15:33:04 +02:00
arm-cci.c	perf/arm-cci: Remove broken race mitigation	2019-05-31 06:46:17 -07:00
arm-ccn.c	Char/Misc driver patches for 4.19-rc1	2018-08-18 11:04:51 -07:00
arm_dsu_pmu.c
arm_pmu.c	drivers/perf: arm_pmu: Fix failure path in PM notifier	2019-08-06 19:06:55 +02:00
arm_pmu_acpi.c	drivers/perf: arm_pmu_acpi: Fix incorrect checking of gicc pointer	2020-03-25 08:06:07 +01:00
arm_pmu_platform.c
arm_spe_pmu.c	perf/aux: Make perf_event accessible to setup_aux()	2019-04-05 22:33:11 +02:00
Kconfig
Makefile
qcom_l2_pmu.c
qcom_l3_pmu.c
xgene_pmu.c