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197ba5f406
The DWC2 driver should now be in good enough shape to move out of staging. I have stress tested it overnight on RPI running mass storage and Ethernet transfers in parallel, and for several days on our proprietary PCI-based platform. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
25 lines
808 B
Makefile
25 lines
808 B
Makefile
ccflags-$(CONFIG_USB_DWC2_DEBUG) += -DDEBUG
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ccflags-$(CONFIG_USB_DWC2_VERBOSE) += -DVERBOSE_DEBUG
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obj-$(CONFIG_USB_DWC2) += dwc2.o
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dwc2-y += core.o core_intr.o
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# NOTE: This driver at present only implements the Host mode
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# of the controller. The existing s3c-hsotg driver supports
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# Peripheral mode, but only for the Samsung S3C platforms.
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# There are plans to merge the s3c-hsotg driver with this
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# driver in the near future to create a dual-role driver. Once
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# that is done, Host mode will become an optional feature that
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# is selected with a config option.
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dwc2-y += hcd.o hcd_intr.o
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dwc2-y += hcd_queue.o hcd_ddma.o
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ifneq ($(CONFIG_PCI),)
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obj-$(CONFIG_USB_DWC2) += dwc2_pci.o
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endif
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obj-$(CONFIG_USB_DWC2) += dwc2_platform.o
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dwc2_pci-y += pci.o
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dwc2_platform-y += platform.o
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