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![Linus Torvalds](/assets/img/avatar_default.png)
- Add support for Power Supply to AXP813 - Add support for GPIO, ADC, AC and Battery Power Supply to AXP803 - Add support for UART to Exynos LPASS - Fix-ups - Use supplied MACROS; ti_am335x_tscadc - Trivial spelling/whitespace/alignment; tmio, axp20x, rave-sp - Regmap changes; bd9571mwv, wm5110-tables - Kconfig dependencies; MFD_AT91_USART - Supply shared data for child-devices; madera-core - Use new of_node_name_eq() API call; max77620, stmpe - Use managed resources (devm_*); tps65218 - Comment descriptions; ingenic-tcu - Coding style; madera-core - Bug Fixes - Fix section mismatches; twl-core, db8500-prcmu - Correct error path related issues; mt6397-core, ab8500-core, mc13xxx-core - IRQ related fixes; tps6586x - Ensure proper initialisation sequence; qcom_rpm - Repair potential memory leak; cros_ec_dev -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlwt0eMACgkQUa+KL4f8 d2EiXBAApGil4yvMMczlCThaq9scR2e3PrwhKCWszbo+QO1QzM/0Tyo88D5sXUj5 UxBIIU8lBC8rP9vkNkAob+UwNZZfuDB/iCEQ3PezbuXFxH6tglRMXzodtevQj4Nf LAfOa5OFjHZo9CgG03wqzOEqeS84CvKtOhvKZzG1iaFUExbT5HHCt1G+F4GdMoLf lkYNnQCk8Hv90NCwHobT6tl/hiz0ztVN//Xd94saQmrJc2SXviflAv9RxncKA8b0 ESVgaZf+x4A+KyXzE3bUfffpZL/0rwq72yG6W7SQ8aO5QGdVjt1qYu8yMm0GFQOv 2f7kkChnS54rFaSUFFO6PExy0Pz32/yTIu7iJrhR4R76TVFIYke2tNDJHjpYSlBf MPmnz4kZg7SUl9W+MGfCcGCsw8+vTeDgoQiLf+Xy6n78LNOx9AV2seYeraxC9njP xn3vKTX83A5RC/thmcdBFG7LE0uER2y0+S3oodBveGRHWEizZ701iKjwlZiK/51v MBMgjuOiu8eIlJK7hKYyv0rAAgWFoiIarOin6mTfq/cQxR3jU+U3jCenAxwcZ2VD 9o5wE7O7zA/4z1nc3uG0o2tGoE6FH7sGot1+d4lyqaHUhYQUIyvUAl9dUnH323rO Bl9cCFU7pI4PQTyGHVNfJH8AHar9AQGbEfEWekC9Nl36MEY0ThE= =BwG/ -----END PGP SIGNATURE----- Merge tag 'mfd-next-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Device Support - Add support for Power Supply to AXP813 - Add support for GPIO, ADC, AC and Battery Power Supply to AXP803 - Add support for UART to Exynos LPASS Fix-ups: - Use supplied MACROS; ti_am335x_tscadc - Trivial spelling/whitespace/alignment; tmio, axp20x, rave-sp - Regmap changes; bd9571mwv, wm5110-tables - Kconfig dependencies; MFD_AT91_USART - Supply shared data for child-devices; madera-core - Use new of_node_name_eq() API call; max77620, stmpe - Use managed resources (devm_*); tps65218 - Comment descriptions; ingenic-tcu - Coding style; madera-core Bug Fixes: - Fix section mismatches; twl-core, db8500-prcmu - Correct error path related issues; mt6397-core, ab8500-core, mc13xxx-core - IRQ related fixes; tps6586x - Ensure proper initialisation sequence; qcom_rpm - Repair potential memory leak; cros_ec_dev" * tag 'mfd-next-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (25 commits) mfd: exynos-lpass: Enable UART module support mfd: mc13xxx: Fix a missing check of a register-read failure mfd: cros_ec: Add commands to control codec mfd: madera: Remove spurious semicolon in while loop mfd: rave-sp: Fix typo in rave_sp_checksum comment mfd: ingenic-tcu: Fix bit field description in header mfd: tps65218: Use devm_regmap_add_irq_chip and clean up error path in probe() mfd: Use of_node_name_eq() for node name comparisons mfd: cros_ec_dev: Add missing mfd_remove_devices() call in remove mfd: axp20x: Add supported cells for AXP803 mfd: axp20x: Re-align MFD cell entries mfd: axp20x: Add AC power supply cell for AXP813 mfd: wm5110: Add missing ASRC rate register mfd: qcom_rpm: write fw_version to CTRL_REG mfd: tps6586x: Handle interrupts on suspend mfd: madera: Add shared data for accessory detection mfd: at91-usart: Add platform dependency mfd: bd9571mwv: Add volatile register to make DVFS work mfd: ab8500-core: Return zero in get_register_interruptible() mfd: tmio: Typo s/use use/use/ ...
137 lines
3.7 KiB
C
137 lines
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef MFD_TMIO_H
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#define MFD_TMIO_H
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#include <linux/device.h>
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#include <linux/fb.h>
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#include <linux/io.h>
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#include <linux/jiffies.h>
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#include <linux/mmc/card.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#define tmio_ioread8(addr) readb(addr)
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#define tmio_ioread16(addr) readw(addr)
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#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
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#define tmio_ioread32(addr) \
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(((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
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#define tmio_iowrite8(val, addr) writeb((val), (addr))
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#define tmio_iowrite16(val, addr) writew((val), (addr))
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#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
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#define tmio_iowrite32(val, addr) \
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do { \
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writew((val), (addr)); \
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writew((val) >> 16, (addr) + 2); \
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} while (0)
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#define sd_config_write8(base, shift, reg, val) \
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tmio_iowrite8((val), (base) + ((reg) << (shift)))
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#define sd_config_write16(base, shift, reg, val) \
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tmio_iowrite16((val), (base) + ((reg) << (shift)))
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#define sd_config_write32(base, shift, reg, val) \
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do { \
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tmio_iowrite16((val), (base) + ((reg) << (shift))); \
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tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
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} while (0)
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/* tmio MMC platform flags */
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/*
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* Some controllers can support a 2-byte block size when the bus width
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* is configured in 4-bit mode.
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*/
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#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
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/*
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* Some controllers can support SDIO IRQ signalling.
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*/
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#define TMIO_MMC_SDIO_IRQ BIT(2)
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/* Some features are only available or tested on R-Car Gen2 or later */
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#define TMIO_MMC_MIN_RCAR2 BIT(3)
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/*
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* Some controllers require waiting for the SD bus to become
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* idle before writing to some registers.
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*/
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#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
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/* BIT(5) is unused */
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/*
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* Some controllers have CMD12 automatically
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* issue/non-issue register
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*/
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#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
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/* Controller has some SDIO status bits which must be 1 */
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#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
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/*
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* Some controllers have a 32-bit wide data port register
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*/
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#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
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/*
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* Some controllers allows to set SDx actual clock
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*/
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#define TMIO_MMC_CLK_ACTUAL BIT(10)
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/* Some controllers have a CBSY bit */
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#define TMIO_MMC_HAVE_CBSY BIT(11)
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/* Some controllers that support HS400 use 4 taps while others use 8. */
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#define TMIO_MMC_HAVE_4TAP_HS400 BIT(13)
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int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
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int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
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void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
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void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
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struct dma_chan;
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/*
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* data for the MMC controller
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*/
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struct tmio_mmc_data {
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void *chan_priv_tx;
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void *chan_priv_rx;
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unsigned int hclk;
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unsigned long capabilities;
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unsigned long capabilities2;
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unsigned long flags;
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u32 ocr_mask; /* available voltages */
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int alignment_shift;
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dma_addr_t dma_rx_offset;
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unsigned int max_blk_count;
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unsigned short max_segs;
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void (*set_pwr)(struct platform_device *host, int state);
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void (*set_clk_div)(struct platform_device *host, int state);
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};
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/*
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* data for the NAND controller
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*/
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struct tmio_nand_data {
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struct nand_bbt_descr *badblock_pattern;
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struct mtd_partition *partition;
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unsigned int num_partitions;
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const char *const *part_parsers;
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};
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#define FBIO_TMIO_ACC_WRITE 0x7C639300
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#define FBIO_TMIO_ACC_SYNC 0x7C639301
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struct tmio_fb_data {
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int (*lcd_set_power)(struct platform_device *fb_dev,
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bool on);
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int (*lcd_mode)(struct platform_device *fb_dev,
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const struct fb_videomode *mode);
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int num_modes;
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struct fb_videomode *modes;
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/* in mm: size of screen */
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int height;
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int width;
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};
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#endif
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