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cycle: Core changes: - Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended. This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run. Right now it is opt-in per driver. - Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps. Right now the Meson (AMlogic) driver needs this. New drivers: - New subdriver for the Tegra 194 SoC. - New subdriver for the Qualcomm SDM845. - New subdriver for the Qualcomm SM8150. - New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP). - New subdriver for Marvell MV98DX1135. Driver improvements: - The Bitmain BM1880 driver now supports pin config in addition to muxing. - The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine. - A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC. - A slew of improvements over the SH PFC drivers as usual. - Misc cleanups and fixes. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl0oTPcACgkQQRCzN7AZ XXNTsw//aNPfkJS8gRszv58G56lyuO8h6Cq4m5eDpzhlpjx5qjELgi9h2UNGINqD 7CWxo35ufbKe0fDIcqpXmtuDMtSu6MuKT3SMepuw9uf9wxyndK4RIuyb0lpAJrx2 +NMPxzS+ARlrMmcfvXPRyPWHqAkXsQk6zcCgiuNCPtROkOZgs1YZ3+pemZw2/FMq gSLTO/95p0TPWr6YAlpByqfsA1A/onEm9HOiU2INV7DrAfUj7mnkuC1nZ4IJDFcv Gn6qQVQPah+MBzkwt4WXy5kDRozCIbg7x+FQBw3KAO23TrLDTFuNsYIWGFcP2CN2 eT8iSP3cWrXNUuEgcPD59aO07rhFooT+QBQFt2ih1dJCV1u/795wb57nxSh1YDcO M2tG+AW2EZky65FXwhLW2rq3LvmTM4kiEz3mA/DrcOAKvvQllK+6FKEhNy0StstP yvvlqoXdgH3sfOnWTAyHr35qA/pMuGEXSryWTJPqpflCvZ3wxNk+IV5nyPAtfaFz CK7U0Ya7NaEp/5ZlpE720apJ4uSqmRrLwk5Y1eKQvT46mGOk3rC9ZPIMXc8mB10/ mJ9mTubi1t4uIPnBl/T1T7f8QhNtr9hOY6wjLf1LoMeJ1XVNBqA+2uydOlBJ1iop RQ7y/Jl1SZ/gBzKCmvjPHT2+0Oui9oXGd9bQi0xQKO5Lus/nAIg= =Wdw1 -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.3 kernel cycle: Core changes: - Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended. This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run. Right now it is opt-in per driver. - Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps. Right now the Meson (AMlogic) driver needs this. New drivers: - New subdriver for the Tegra 194 SoC. - New subdriver for the Qualcomm SDM845. - New subdriver for the Qualcomm SM8150. - New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP). - New subdriver for Marvell MV98DX1135. Driver improvements: - The Bitmain BM1880 driver now supports pin config in addition to muxing. - The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine. - A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC. - A slew of improvements over the SH PFC drivers as usual. - Misc cleanups and fixes" * tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits) pinctrl: aspeed: Strip moved macros and structs from private header pinctrl: aspeed: Fix missed include pinctrl: baytrail: Use GENMASK() consistently pinctrl: baytrail: Re-use data structures from pinctrl-intel.h pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux() pinctrl: qcom: Add SM8150 pinctrl driver dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding dt-bindings: pinctrl: qcom: Document missing gpio nodes pinctrl: aspeed: Add implementation-related documentation pinctrl: aspeed: Split out pinmux from general pinctrl pinctrl: aspeed: Clarify comment about strapping W1C pinctrl: aspeed: Correct comment that is no longer true MAINTAINERS: Add entry for ASPEED pinctrl drivers dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema dt-bindings: pinctrl: aspeed: Split bindings document in two pinctrl: qcom: Add irq_enable callback for msm gpio pinctrl: madera: Fixup SPDX headers pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard pinctrl: tegra: Add bitmask support for parked bits ...
222 lines
9.4 KiB
C
222 lines
9.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Interface the generic pinconfig portions of the pinctrl subsystem
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*
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* Copyright (C) 2011 ST-Ericsson SA
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* Written on behalf of Linaro for ST-Ericsson
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* This interface is used in the core to keep track of pins.
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*
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* Author: Linus Walleij <linus.walleij@linaro.org>
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*/
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#ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H
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#define __LINUX_PINCTRL_PINCONF_GENERIC_H
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#include <linux/device.h>
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#include <linux/pinctrl/machine.h>
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struct pinctrl_dev;
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struct pinctrl_map;
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/**
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* enum pin_config_param - possible pin configuration parameters
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* @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
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* weakly drives the last value on a tristate bus, also known as a "bus
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* holder", "bus keeper" or "repeater". This allows another device on the
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* bus to change the value by driving the bus high or low and switching to
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* tristate. The argument is ignored.
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* @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
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* transition from say pull-up to pull-down implies that you disable
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* pull-up in the process, this setting disables all biasing.
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* @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
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* mode, also know as "third-state" (tristate) or "high-Z" or "floating".
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* On output pins this effectively disconnects the pin, which is useful
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* if for example some other pin is going to drive the signal connected
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* to it for a while. Pins used for input are usually always high
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* impedance.
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* @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
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* impedance to GROUND). If the argument is != 0 pull-down is enabled,
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* if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
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* @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
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* on embedded knowledge of the controller hardware, like current mux
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* function. The pull direction and possibly strength too will normally
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* be decided completely inside the hardware block and not be readable
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* from the kernel side.
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* If the argument is != 0 pull up/down is enabled, if it is 0, the
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* configuration is ignored. The proper way to disable it is to use
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* @PIN_CONFIG_BIAS_DISABLE.
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* @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
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* impedance to VDD). If the argument is != 0 pull-up is enabled,
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* if it is 0, pull-up is total, i.e. the pin is connected to VDD.
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* @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
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* collector) which means it is usually wired with other output ports
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* which are then pulled up with an external resistor. Setting this
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* config will enable open drain mode, the argument is ignored.
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* @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
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* (open emitter). Setting this config will enable open source mode, the
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* argument is ignored.
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* @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
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* low, this is the most typical case and is typically achieved with two
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* active transistors on the output. Setting this config will enable
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* push-pull mode, the argument is ignored.
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* @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
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* passed as argument. The argument is in mA.
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* @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current
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* passed as argument. The argument is in uA.
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* @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
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* which means it will wait for signals to settle when reading inputs. The
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* argument gives the debounce time in usecs. Setting the
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* argument to zero turns debouncing off.
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* @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not
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* affect the pin's ability to drive output. 1 enables input, 0 disables
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* input.
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* @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
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* schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
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* the threshold value is given on a custom format as argument when
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* setting pins to this mode.
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* @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
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* If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
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* schmitt-trigger mode is disabled.
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* @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power
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* operation, if several modes of operation are supported these can be
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* passed in the argument on a custom form, else just use argument 1
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* to indicate low power mode, argument 0 turns low power mode off.
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* @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
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* without driving a value there. For most platforms this reduces to
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* enable the output buffers and then let the pin controller current
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* configuration (eg. the currently selected mux function) drive values on
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* the line. Use argument 1 to enable output mode, argument 0 to disable
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* it.
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* @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
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* value on the line. Use argument 1 to indicate high level, argument 0 to
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* indicate low level. (Please see Documentation/driver-api/pinctl.rst,
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* section "GPIO mode pitfalls" for a discussion around this parameter.)
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* @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
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* supplies, the argument to this parameter (on a custom format) tells
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* the driver which alternative power source to use.
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* @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
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* @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
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* this parameter (on a custom format) tells the driver which alternative
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* slew rate to use.
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* @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
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* or latch delay (on outputs) this parameter (in a custom format)
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* specifies the clock skew or latch delay. It typically controls how
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* many double inverters are put in front of the line.
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* @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset
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* @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
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* you need to pass in custom configurations to the pin controller, use
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* PIN_CONFIG_END+1 as the base offset.
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* @PIN_CONFIG_MAX: this is the maximum configuration value that can be
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* presented using the packed format.
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*/
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enum pin_config_param {
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PIN_CONFIG_BIAS_BUS_HOLD,
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PIN_CONFIG_BIAS_DISABLE,
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PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
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PIN_CONFIG_BIAS_PULL_DOWN,
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PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
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PIN_CONFIG_BIAS_PULL_UP,
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PIN_CONFIG_DRIVE_OPEN_DRAIN,
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PIN_CONFIG_DRIVE_OPEN_SOURCE,
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PIN_CONFIG_DRIVE_PUSH_PULL,
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PIN_CONFIG_DRIVE_STRENGTH,
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PIN_CONFIG_DRIVE_STRENGTH_UA,
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PIN_CONFIG_INPUT_DEBOUNCE,
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PIN_CONFIG_INPUT_ENABLE,
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PIN_CONFIG_INPUT_SCHMITT,
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PIN_CONFIG_INPUT_SCHMITT_ENABLE,
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PIN_CONFIG_LOW_POWER_MODE,
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PIN_CONFIG_OUTPUT_ENABLE,
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PIN_CONFIG_OUTPUT,
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PIN_CONFIG_POWER_SOURCE,
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PIN_CONFIG_SLEEP_HARDWARE_STATE,
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PIN_CONFIG_SLEW_RATE,
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PIN_CONFIG_SKEW_DELAY,
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PIN_CONFIG_PERSIST_STATE,
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PIN_CONFIG_END = 0x7F,
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PIN_CONFIG_MAX = 0xFF,
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};
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/*
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* Helpful configuration macro to be used in tables etc.
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*/
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#define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL))
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/*
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* The following inlines stuffs a configuration parameter and data value
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* into and out of an unsigned long argument, as used by the generic pin config
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* system. We put the parameter in the lower 8 bits and the argument in the
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* upper 24 bits.
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*/
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static inline enum pin_config_param pinconf_to_config_param(unsigned long config)
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{
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return (enum pin_config_param) (config & 0xffUL);
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}
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static inline u32 pinconf_to_config_argument(unsigned long config)
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{
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return (u32) ((config >> 8) & 0xffffffUL);
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}
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static inline unsigned long pinconf_to_config_packed(enum pin_config_param param,
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u32 argument)
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{
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return PIN_CONF_PACKED(param, argument);
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}
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#define PCONFDUMP(a, b, c, d) { \
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.param = a, .display = b, .format = c, .has_arg = d \
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}
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struct pin_config_item {
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const enum pin_config_param param;
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const char * const display;
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const char * const format;
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bool has_arg;
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};
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struct pinconf_generic_params {
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const char * const property;
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enum pin_config_param param;
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u32 default_value;
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};
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int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np, struct pinctrl_map **map,
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unsigned *reserved_maps, unsigned *num_maps,
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enum pinctrl_map_type type);
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int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np_config, struct pinctrl_map **map,
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unsigned *num_maps, enum pinctrl_map_type type);
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void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps);
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static inline int pinconf_generic_dt_node_to_map_group(
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struct pinctrl_dev *pctldev, struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
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PIN_MAP_TYPE_CONFIGS_GROUP);
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}
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static inline int pinconf_generic_dt_node_to_map_pin(
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struct pinctrl_dev *pctldev, struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
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PIN_MAP_TYPE_CONFIGS_PIN);
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}
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static inline int pinconf_generic_dt_node_to_map_all(
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struct pinctrl_dev *pctldev, struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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/*
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* passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser
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* to infer the map type from the DT properties used.
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*/
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return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
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PIN_MAP_TYPE_INVALID);
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}
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#endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */
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