mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-21 18:11:39 +00:00
fa121bb3fe
- Removal of readq & writeq for MIPS32 kernels where they would simply
BUG() anyway, allowing drivers or other code that #ifdefs on their
presence to work properly.
- Improvements for Ingenic JZ4740 systems, including support for the
external memory controller & pinmuxing fixes for qi_lb60/NanoNote
systems.
- Improvements for Lantiq systems, in particular around SMP & IPIs.
- DT updates for ralink/MediaTek MT7628a systems to probe & configure a
bunch more devices.
- Miscellaneous cleanups & build fixes.
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Merge tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
"A light batch this time around but significant improvements for
certain systems:
- Removal of readq & writeq for MIPS32 kernels where they would
simply BUG() anyway, allowing drivers or other code that #ifdefs on
their presence to work properly.
- Improvements for Ingenic JZ4740 systems, including support for the
external memory controller & pinmuxing fixes for qi_lb60/NanoNote
systems.
- Improvements for Lantiq systems, in particular around SMP & IPIs.
- DT updates for ralink/MediaTek MT7628a systems to probe & configure
a bunch more devices.
- Miscellaneous cleanups & build fixes"
* tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
MIPS: fix some more fall through errors in arch/mips
MIPS: perf events: handle switch statement falling through warnings
mips/kprobes: Export kprobe_fault_handler()
MAINTAINERS: Add myself as Ingenic SoCs maintainer
MIPS: ralink: mt7628a.dtsi: Add watchdog controller DT node
MIPS: ralink: mt7628a.dtsi: Add SPI controller DT node
MIPS: ralink: mt7628a.dtsi: Add GPIO controller DT node
MIPS: ralink: mt7628a.dtsi: Add pinctrl DT properties to the UART nodes
MIPS: ralink: mt7628a.dtsi: Add pinmux DT node
MIPS: ralink: mt7628a.dtsi: Add SPDX GPL-2.0 license identifier
MIPS: lantiq: Add SMP support for lantiq interrupt controller
MIPS: lantiq: Shorten register names, remove unused macros
MIPS: lantiq: Fix bitfield masking
MIPS: lantiq: Remove unused macros
MIPS: lantiq: Fix attributes of of_device_id structure
MIPS: lantiq: Change variables to the same type as the source
MIPS: lantiq: Move macro directly to iomem function
mips: Remove q-accessors from non-64bit platforms
FDDI: defza: Include linux/io-64-nonatomic-lo-hi.h
MIPS: configs: Remove useless UEVENT_HELPER_PATH
...
93 lines
2 KiB
C
93 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/pm.h>
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#include <linux/time.h>
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#include <asm/reboot.h>
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#include <asm/mach-ar7/ar7.h>
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#include <asm/mach-ar7/prom.h>
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static void ar7_machine_restart(char *command)
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{
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u32 *softres_reg = ioremap(AR7_REGS_RESET + AR7_RESET_SOFTWARE, 1);
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writel(1, softres_reg);
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}
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static void ar7_machine_halt(void)
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{
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while (1)
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;
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}
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static void ar7_machine_power_off(void)
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{
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u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
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u32 power_state = readl(power_reg) | (3 << 30);
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writel(power_state, power_reg);
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ar7_machine_halt();
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}
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const char *get_system_type(void)
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{
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u16 chip_id = ar7_chip_id();
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u16 titan_variant_id = titan_chip_id();
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switch (chip_id) {
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case AR7_CHIP_7100:
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return "TI AR7 (TNETD7100)";
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case AR7_CHIP_7200:
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return "TI AR7 (TNETD7200)";
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case AR7_CHIP_7300:
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return "TI AR7 (TNETD7300)";
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case AR7_CHIP_TITAN:
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switch (titan_variant_id) {
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case TITAN_CHIP_1050:
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return "TI AR7 (TNETV1050)";
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case TITAN_CHIP_1055:
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return "TI AR7 (TNETV1055)";
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case TITAN_CHIP_1056:
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return "TI AR7 (TNETV1056)";
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case TITAN_CHIP_1060:
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return "TI AR7 (TNETV1060)";
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}
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/* fall through */
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default:
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return "TI AR7 (unknown)";
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}
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}
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static int __init ar7_init_console(void)
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{
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return 0;
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}
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console_initcall(ar7_init_console);
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/*
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* Initializes basic routines and structures pointers, memory size (as
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* given by the bios and saves the command line.
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*/
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void __init plat_mem_setup(void)
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{
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unsigned long io_base;
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_machine_restart = ar7_machine_restart;
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_machine_halt = ar7_machine_halt;
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pm_power_off = ar7_machine_power_off;
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io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
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if (!io_base)
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panic("Can't remap IO base!");
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set_io_port_base(io_base);
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prom_meminit();
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printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n",
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get_system_type(), ar7_chip_id(), ar7_chip_rev());
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}
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