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3a6c501e96
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
37 lines
1.2 KiB
Text
37 lines
1.2 KiB
Text
* Atmel Quad Serial Peripheral Interface (QSPI)
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Required properties:
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- compatible: Should be one of the following:
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- "atmel,sama5d2-qspi"
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- "microchip,sam9x60-qspi"
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- reg: Should contain the locations and lengths of the base registers
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and the mapped memory.
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- reg-names: Should contain the resource reg names:
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- qspi_base: configuration register address space
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- qspi_mmap: memory mapped address space
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- interrupts: Should contain the interrupt for the device.
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- clocks: Should reference the peripheral clock and the QSPI system
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clock if available.
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- clock-names: Should contain "pclk" for the peripheral clock and "qspick"
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for the system clock when available.
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- #address-cells: Should be <1>.
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- #size-cells: Should be <0>.
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Example:
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spi@f0020000 {
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compatible = "atmel,sama5d2-qspi";
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reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
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reg-names = "qspi_base", "qspi_mmap";
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interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
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clock-names = "pclk";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0_default>;
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m25p80@0 {
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...
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};
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};
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