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Shared mailboxes are a mechanism to transport data from one processor in the system to another. They are bidirectional links with both a producer and a consumer. Interrupts are used to let the consumer know when data was written to the mailbox by the producer, and to let the producer know when the consumer has read the data from the mailbox. These interrupts are mapped to one or more "shared interrupts". Typically each processor in the system owns one of these shared interrupts. Add documentation to the device tree bindings about how clients can use mailbox specifiers to request a specific shared mailbox and select which direction they drive. Also document how to specify the shared interrupts in addition to the existing doorbell interrupt. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
36 lines
1 KiB
C
36 lines
1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants for binding nvidia,tegra186-hsp.
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*/
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#ifndef _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
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#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
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/*
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* These define the type of mailbox that is to be used (doorbell, shared
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* mailbox, shared semaphore or arbitrated semaphore).
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*/
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#define TEGRA_HSP_MBOX_TYPE_DB 0x0
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#define TEGRA_HSP_MBOX_TYPE_SM 0x1
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#define TEGRA_HSP_MBOX_TYPE_SS 0x2
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#define TEGRA_HSP_MBOX_TYPE_AS 0x3
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/*
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* These defines represent the bit associated with the given master ID in the
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* doorbell registers.
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*/
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#define TEGRA_HSP_DB_MASTER_CCPLEX 17
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#define TEGRA_HSP_DB_MASTER_BPMP 19
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/*
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* Shared mailboxes are unidirectional, so the direction needs to be specified
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* in the device tree.
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*/
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#define TEGRA_HSP_SM_MASK 0x00ffffff
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#define TEGRA_HSP_SM_FLAG_RX (0 << 31)
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#define TEGRA_HSP_SM_FLAG_TX (1 << 31)
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#define TEGRA_HSP_SM_RX(x) (TEGRA_HSP_SM_FLAG_RX | ((x) & TEGRA_HSP_SM_MASK))
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#define TEGRA_HSP_SM_TX(x) (TEGRA_HSP_SM_FLAG_TX | ((x) & TEGRA_HSP_SM_MASK))
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#endif
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