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685efffe37
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the GPCv2 on the i.MX7, but only controls more power domains with a different mapping. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
21 lines
613 B
C
21 lines
613 B
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
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*/
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#ifndef __DT_BINDINGS_IMX8MQ_POWER_H__
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#define __DT_BINDINGS_IMX8MQ_POWER_H__
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#define IMX8M_POWER_DOMAIN_MIPI 0
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#define IMX8M_POWER_DOMAIN_PCIE1 1
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#define IMX8M_POWER_DOMAIN_USB_OTG1 2
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#define IMX8M_POWER_DOMAIN_USB_OTG2 3
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#define IMX8M_POWER_DOMAIN_DDR1 4
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#define IMX8M_POWER_DOMAIN_GPU 5
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#define IMX8M_POWER_DOMAIN_VPU 6
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#define IMX8M_POWER_DOMAIN_DISP 7
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#define IMX8M_POWER_DOMAIN_MIPI_CSI1 8
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#define IMX8M_POWER_DOMAIN_MIPI_CSI2 9
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#define IMX8M_POWER_DOMAIN_PCIE2 10
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#endif
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