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343106d9e6
Add power domains dt-bindings for MT8192. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201030113622.201188-15-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
32 lines
1,017 B
C
32 lines
1,017 B
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (c) 2020 MediaTek Inc.
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* Author: Weiyi Lu <weiyi.lu@mediatek.com>
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*/
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#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
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#define _DT_BINDINGS_POWER_MT8192_POWER_H
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#define MT8192_POWER_DOMAIN_AUDIO 0
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#define MT8192_POWER_DOMAIN_CONN 1
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#define MT8192_POWER_DOMAIN_MFG0 2
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#define MT8192_POWER_DOMAIN_MFG1 3
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#define MT8192_POWER_DOMAIN_MFG2 4
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#define MT8192_POWER_DOMAIN_MFG3 5
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#define MT8192_POWER_DOMAIN_MFG4 6
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#define MT8192_POWER_DOMAIN_MFG5 7
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#define MT8192_POWER_DOMAIN_MFG6 8
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#define MT8192_POWER_DOMAIN_DISP 9
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#define MT8192_POWER_DOMAIN_IPE 10
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#define MT8192_POWER_DOMAIN_ISP 11
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#define MT8192_POWER_DOMAIN_ISP2 12
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#define MT8192_POWER_DOMAIN_MDP 13
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#define MT8192_POWER_DOMAIN_VENC 14
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#define MT8192_POWER_DOMAIN_VDEC 15
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#define MT8192_POWER_DOMAIN_VDEC2 16
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#define MT8192_POWER_DOMAIN_CAM 17
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#define MT8192_POWER_DOMAIN_CAM_RAWA 18
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#define MT8192_POWER_DOMAIN_CAM_RAWB 19
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#define MT8192_POWER_DOMAIN_CAM_RAWC 20
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#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
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