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9c92ab6191
Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
126 lines
3.6 KiB
C
126 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2013, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_RESET_MSM_GCC_8660_H
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#define _DT_BINDINGS_RESET_MSM_GCC_8660_H
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#define AFAB_CORE_RESET 0
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#define SCSS_SYS_RESET 1
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#define SCSS_SYS_POR_RESET 2
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#define AFAB_SMPSS_S_RESET 3
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#define AFAB_SMPSS_M1_RESET 4
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#define AFAB_SMPSS_M0_RESET 5
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#define AFAB_EBI1_S_RESET 6
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#define SFAB_CORE_RESET 7
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#define SFAB_ADM0_M0_RESET 8
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#define SFAB_ADM0_M1_RESET 9
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#define SFAB_ADM0_M2_RESET 10
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#define ADM0_C2_RESET 11
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#define ADM0_C1_RESET 12
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#define ADM0_C0_RESET 13
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#define ADM0_PBUS_RESET 14
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#define ADM0_RESET 15
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#define SFAB_ADM1_M0_RESET 16
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#define SFAB_ADM1_M1_RESET 17
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#define SFAB_ADM1_M2_RESET 18
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#define MMFAB_ADM1_M3_RESET 19
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#define ADM1_C3_RESET 20
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#define ADM1_C2_RESET 21
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#define ADM1_C1_RESET 22
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#define ADM1_C0_RESET 23
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#define ADM1_PBUS_RESET 24
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#define ADM1_RESET 25
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#define IMEM0_RESET 26
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#define SFAB_LPASS_Q6_RESET 27
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#define SFAB_AFAB_M_RESET 28
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#define AFAB_SFAB_M0_RESET 29
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#define AFAB_SFAB_M1_RESET 30
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#define DFAB_CORE_RESET 31
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#define SFAB_DFAB_M_RESET 32
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#define DFAB_SFAB_M_RESET 33
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#define DFAB_SWAY0_RESET 34
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#define DFAB_SWAY1_RESET 35
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#define DFAB_ARB0_RESET 36
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#define DFAB_ARB1_RESET 37
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#define PPSS_PROC_RESET 38
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#define PPSS_RESET 39
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#define PMEM_RESET 40
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#define DMA_BAM_RESET 41
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#define SIC_RESET 42
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#define SPS_TIC_RESET 43
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#define CFBP0_RESET 44
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#define CFBP1_RESET 45
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#define CFBP2_RESET 46
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#define EBI2_RESET 47
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#define SFAB_CFPB_M_RESET 48
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#define CFPB_MASTER_RESET 49
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#define SFAB_CFPB_S_RESET 50
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#define CFPB_SPLITTER_RESET 51
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#define TSIF_RESET 52
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#define CE1_RESET 53
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#define CE2_RESET 54
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#define SFAB_SFPB_M_RESET 55
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#define SFAB_SFPB_S_RESET 56
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#define RPM_PROC_RESET 57
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#define RPM_BUS_RESET 58
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#define RPM_MSG_RAM_RESET 59
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#define PMIC_ARB0_RESET 60
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#define PMIC_ARB1_RESET 61
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#define PMIC_SSBI2_RESET 62
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#define SDC1_RESET 63
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#define SDC2_RESET 64
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#define SDC3_RESET 65
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#define SDC4_RESET 66
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#define SDC5_RESET 67
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#define USB_HS1_RESET 68
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#define USB_HS2_XCVR_RESET 69
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#define USB_HS2_RESET 70
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#define USB_FS1_XCVR_RESET 71
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#define USB_FS1_RESET 72
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#define USB_FS2_XCVR_RESET 73
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#define USB_FS2_RESET 74
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#define GSBI1_RESET 75
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#define GSBI2_RESET 76
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#define GSBI3_RESET 77
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#define GSBI4_RESET 78
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#define GSBI5_RESET 79
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#define GSBI6_RESET 80
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#define GSBI7_RESET 81
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#define GSBI8_RESET 82
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#define GSBI9_RESET 83
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#define GSBI10_RESET 84
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#define GSBI11_RESET 85
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#define GSBI12_RESET 86
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#define SPDM_RESET 87
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#define SEC_CTRL_RESET 88
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#define TLMM_H_RESET 89
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#define TLMM_RESET 90
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#define MARRM_PWRON_RESET 91
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#define MARM_RESET 92
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#define MAHB1_RESET 93
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#define SFAB_MSS_S_RESET 94
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#define MAHB2_RESET 95
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#define MODEM_SW_AHB_RESET 96
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#define MODEM_RESET 97
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#define SFAB_MSS_MDM1_RESET 98
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#define SFAB_MSS_MDM0_RESET 99
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#define MSS_SLP_RESET 100
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#define MSS_MARM_SAW_RESET 101
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#define MSS_WDOG_RESET 102
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#define TSSC_RESET 103
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#define PDM_RESET 104
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#define SCSS_CORE0_RESET 105
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#define SCSS_CORE0_POR_RESET 106
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#define SCSS_CORE1_RESET 107
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#define SCSS_CORE1_POR_RESET 108
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#define MPM_RESET 109
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#define EBI1_1X_DIV_RESET 110
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#define EBI1_RESET 111
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#define SFAB_SMPSS_S_RESET 112
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#define USB_PHY0_RESET 113
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#define USB_PHY1_RESET 114
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#define PRNG_RESET 115
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#endif
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