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8582f6d158
The PCIe host controller found on Tegra20 has a hardware bug that causes PCIe interrupts to get lost when LP2 is enabled. Stub out the workaround on 64-bit ARM because none of the more recent Tegra SoC generations seem to have this bug anymore. Signed-off-by: Thierry Reding <treding@nvidia.com>
25 lines
795 B
C
25 lines
795 B
C
/*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __SOC_TEGRA_CPUIDLE_H__
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#define __SOC_TEGRA_CPUIDLE_H__
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#if defined(CONFIG_ARM) && defined(CONFIG_CPU_IDLE)
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void tegra_cpuidle_pcie_irqs_in_use(void);
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#else
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static inline void tegra_cpuidle_pcie_irqs_in_use(void)
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{
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}
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#endif
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#endif /* __SOC_TEGRA_CPUIDLE_H__ */
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