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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-03 17:40:04 +00:00
![Yinghai Lu](/assets/img/avatar_default.png)
Impact: 32-bit should use logical version there are two version: for default_send_IPI_mask_sequence/allbutself one in ipi.h and one in ipi.c for 32bit it seems .h version overwrote ipi.c for a while. restore it so 32 bit could use its old logical version. also remove dupicated functions in .c Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
802 lines
18 KiB
C
802 lines
18 KiB
C
/*
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* Written by: Garry Forsgren, Unisys Corporation
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* Natalie Protasevich, Unisys Corporation
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* This file contains the code to configure and interface
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* with Unisys ES7000 series hardware system manager.
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*
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* Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it would be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Contact information: Unisys Corporation, Township Line & Union Meeting
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* Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
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*
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* http://www.unisys.com
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/string.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <asm/io.h>
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#include <asm/nmi.h>
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#include <asm/smp.h>
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#include <asm/atomic.h>
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#include <asm/apicdef.h>
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#include <asm/genapic.h>
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#include <asm/setup.h>
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/*
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* ES7000 chipsets
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*/
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#define NON_UNISYS 0
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#define ES7000_CLASSIC 1
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#define ES7000_ZORRO 2
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#define MIP_REG 1
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#define MIP_PSAI_REG 4
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#define MIP_BUSY 1
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#define MIP_SPIN 0xf0000
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#define MIP_VALID 0x0100000000000000ULL
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#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
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#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
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struct mip_reg_info {
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unsigned long long mip_info;
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unsigned long long delivery_info;
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unsigned long long host_reg;
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unsigned long long mip_reg;
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};
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struct part_info {
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unsigned char type;
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unsigned char length;
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unsigned char part_id;
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unsigned char apic_mode;
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unsigned long snum;
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char ptype[16];
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char sname[64];
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char pname[64];
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};
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struct psai {
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unsigned long long entry_type;
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unsigned long long addr;
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unsigned long long bep_addr;
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};
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struct es7000_mem_info {
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unsigned char type;
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unsigned char length;
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unsigned char resv[6];
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unsigned long long start;
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unsigned long long size;
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};
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struct es7000_oem_table {
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unsigned long long hdr;
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struct mip_reg_info mip;
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struct part_info pif;
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struct es7000_mem_info shm;
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struct psai psai;
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};
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#ifdef CONFIG_ACPI
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struct oem_table {
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struct acpi_table_header Header;
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u32 OEMTableAddr;
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u32 OEMTableSize;
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};
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extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
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extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
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#endif
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struct mip_reg {
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unsigned long long off_0;
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unsigned long long off_8;
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unsigned long long off_10;
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unsigned long long off_18;
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unsigned long long off_20;
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unsigned long long off_28;
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unsigned long long off_30;
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unsigned long long off_38;
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};
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#define MIP_SW_APIC 0x1020b
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#define MIP_FUNC(VALUE) (VALUE & 0xff)
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/*
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* ES7000 Globals
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*/
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static volatile unsigned long *psai = NULL;
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static struct mip_reg *mip_reg;
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static struct mip_reg *host_reg;
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static int mip_port;
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static unsigned long mip_addr, host_addr;
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int es7000_plat;
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/*
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* GSI override for ES7000 platforms.
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*/
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static unsigned int base;
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static int
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es7000_rename_gsi(int ioapic, int gsi)
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{
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if (es7000_plat == ES7000_ZORRO)
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return gsi;
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if (!base) {
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int i;
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for (i = 0; i < nr_ioapics; i++)
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base += nr_ioapic_registers[i];
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}
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if (!ioapic && (gsi < 16))
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gsi += base;
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return gsi;
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}
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static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
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{
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unsigned long vect = 0, psaival = 0;
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if (psai == NULL)
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return -1;
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vect = ((unsigned long)__pa(eip)/0x1000) << 16;
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psaival = (0x1000000 | vect | cpu);
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while (*psai & 0x1000000)
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;
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*psai = psaival;
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return 0;
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}
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static int __init es7000_update_genapic(void)
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{
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apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
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/* MPENTIUMIII */
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if (boot_cpu_data.x86 == 6 &&
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(boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
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es7000_update_genapic_to_cluster();
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apic->wait_for_init_deassert = NULL;
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apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
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}
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return 0;
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}
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void __init
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setup_unisys(void)
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{
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/*
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* Determine the generation of the ES7000 currently running.
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*
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* es7000_plat = 1 if the machine is a 5xx ES7000 box
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* es7000_plat = 2 if the machine is a x86_64 ES7000 box
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*
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*/
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if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
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es7000_plat = ES7000_ZORRO;
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else
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es7000_plat = ES7000_CLASSIC;
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ioapic_renumber_irq = es7000_rename_gsi;
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x86_quirks->update_genapic = es7000_update_genapic;
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}
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/*
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* Parse the OEM Table
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*/
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int __init
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parse_unisys_oem (char *oemptr)
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{
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int i;
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int success = 0;
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unsigned char type, size;
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unsigned long val;
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char *tp = NULL;
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struct psai *psaip = NULL;
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struct mip_reg_info *mi;
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struct mip_reg *host, *mip;
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tp = oemptr;
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tp += 8;
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for (i=0; i <= 6; i++) {
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type = *tp++;
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size = *tp++;
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tp -= 2;
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switch (type) {
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case MIP_REG:
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mi = (struct mip_reg_info *)tp;
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val = MIP_RD_LO(mi->host_reg);
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host_addr = val;
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host = (struct mip_reg *)val;
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host_reg = __va(host);
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val = MIP_RD_LO(mi->mip_reg);
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mip_port = MIP_PORT(mi->mip_info);
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mip_addr = val;
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mip = (struct mip_reg *)val;
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mip_reg = __va(mip);
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pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
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(unsigned long)host_reg);
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pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
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(unsigned long)mip_reg);
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success++;
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break;
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case MIP_PSAI_REG:
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psaip = (struct psai *)tp;
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if (tp != NULL) {
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if (psaip->addr)
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psai = __va(psaip->addr);
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else
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psai = NULL;
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success++;
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}
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break;
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default:
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break;
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}
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tp += size;
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}
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if (success < 2) {
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es7000_plat = NON_UNISYS;
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} else
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setup_unisys();
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return es7000_plat;
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}
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#ifdef CONFIG_ACPI
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static unsigned long oem_addrX;
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static unsigned long oem_size;
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int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
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{
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struct acpi_table_header *header = NULL;
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int i = 0;
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while (ACPI_SUCCESS(acpi_get_table("OEM1", i++, &header))) {
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if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
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struct oem_table *t = (struct oem_table *)header;
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oem_addrX = t->OEMTableAddr;
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oem_size = t->OEMTableSize;
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*oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
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oem_size);
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return 0;
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}
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}
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return -1;
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}
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void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
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{
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}
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#endif
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static void
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es7000_spin(int n)
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{
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int i = 0;
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while (i++ < n)
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rep_nop();
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}
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static int __init
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es7000_mip_write(struct mip_reg *mip_reg)
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{
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int status = 0;
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int spin;
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spin = MIP_SPIN;
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while (((unsigned long long)host_reg->off_38 &
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(unsigned long long)MIP_VALID) != 0) {
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if (--spin <= 0) {
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printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
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return -1;
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}
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es7000_spin(MIP_SPIN);
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}
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memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
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outb(1, mip_port);
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spin = MIP_SPIN;
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while (((unsigned long long)mip_reg->off_38 &
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(unsigned long long)MIP_VALID) == 0) {
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if (--spin <= 0) {
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printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
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return -1;
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}
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es7000_spin(MIP_SPIN);
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}
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status = ((unsigned long long)mip_reg->off_0 &
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(unsigned long long)0xffff0000000000ULL) >> 48;
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mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
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(unsigned long long)~MIP_VALID);
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return status;
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}
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void __init es7000_enable_apic_mode(void)
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{
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struct mip_reg es7000_mip_reg;
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int mip_status;
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if (!es7000_plat)
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return;
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printk("ES7000: Enabling APIC mode.\n");
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memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
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es7000_mip_reg.off_0 = MIP_SW_APIC;
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es7000_mip_reg.off_38 = MIP_VALID;
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while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) {
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printk("es7000_enable_apic_mode: command failed, status = %x\n",
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mip_status);
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}
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}
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/*
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* APIC driver for the Unisys ES7000 chipset.
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*/
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#define APIC_DEFINITION 1
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <asm/mpspec.h>
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#include <asm/genapic.h>
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#include <asm/fixmap.h>
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#include <asm/apicdef.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <linux/smp.h>
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#include <asm/ipi.h>
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#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
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#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
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#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
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#define APIC_DFR_VALUE (APIC_DFR_FLAT)
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extern void es7000_enable_apic_mode(void);
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extern int apic_version [MAX_APICS];
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extern u8 cpu_2_logical_apicid[];
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extern unsigned int boot_cpu_physical_apicid;
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extern int parse_unisys_oem (char *oemptr);
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extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
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extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
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extern void setup_unisys(void);
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#define apicid_cluster(apicid) (apicid & 0xF0)
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#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
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static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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*retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
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}
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static void es7000_wait_for_init_deassert(atomic_t *deassert)
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{
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#ifndef CONFIG_ES7000_CLUSTERED_APIC
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while (!atomic_read(deassert))
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cpu_relax();
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#endif
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return;
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}
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static unsigned int es7000_get_apic_id(unsigned long x)
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{
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return (x >> 24) & 0xFF;
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}
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#ifdef CONFIG_ACPI
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static int es7000_check_dsdt(void)
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{
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struct acpi_table_header header;
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if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
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!strncmp(header.oem_id, "UNISYS", 6))
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return 1;
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return 0;
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}
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#endif
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static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
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{
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default_send_IPI_mask_sequence_phys(mask, vector);
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}
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static void es7000_send_IPI_allbutself(int vector)
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{
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default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
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}
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static void es7000_send_IPI_all(int vector)
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{
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es7000_send_IPI_mask(cpu_online_mask, vector);
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}
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static int es7000_apic_id_registered(void)
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{
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return 1;
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}
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static const cpumask_t *target_cpus_cluster(void)
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{
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return &CPU_MASK_ALL;
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}
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static const cpumask_t *es7000_target_cpus(void)
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{
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return &cpumask_of_cpu(smp_processor_id());
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}
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static unsigned long
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es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
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{
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return 0;
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}
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static unsigned long es7000_check_apicid_present(int bit)
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{
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return physid_isset(bit, phys_cpu_present_map);
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}
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static unsigned long calculate_ldr(int cpu)
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{
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unsigned long id = xapic_phys_to_log_apicid(cpu);
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return (SET_APIC_LOGICAL_ID(id));
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}
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/*
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* Set up the logical destination ID.
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*
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* Intel recommends to set DFR, LdR and TPR before enabling
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* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
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* document number 292116). So here it goes...
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*/
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static void es7000_init_apic_ldr_cluster(void)
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{
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unsigned long val;
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int cpu = smp_processor_id();
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apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
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val = calculate_ldr(cpu);
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apic_write(APIC_LDR, val);
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}
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static void es7000_init_apic_ldr(void)
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{
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unsigned long val;
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int cpu = smp_processor_id();
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apic_write(APIC_DFR, APIC_DFR_VALUE);
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val = calculate_ldr(cpu);
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apic_write(APIC_LDR, val);
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}
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static void es7000_setup_apic_routing(void)
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{
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int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
|
|
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
|
|
(apic_version[apic] == 0x14) ?
|
|
"Physical Cluster" : "Logical Cluster",
|
|
nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
|
|
}
|
|
|
|
static int es7000_apicid_to_node(int logical_apicid)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int es7000_cpu_present_to_apicid(int mps_cpu)
|
|
{
|
|
if (!mps_cpu)
|
|
return boot_cpu_physical_apicid;
|
|
else if (mps_cpu < nr_cpu_ids)
|
|
return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
|
|
else
|
|
return BAD_APICID;
|
|
}
|
|
|
|
static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
|
|
{
|
|
static int id = 0;
|
|
physid_mask_t mask;
|
|
|
|
mask = physid_mask_of_physid(id);
|
|
++id;
|
|
|
|
return mask;
|
|
}
|
|
|
|
/* Mapping from cpu number to logical apicid */
|
|
static int es7000_cpu_to_logical_apicid(int cpu)
|
|
{
|
|
#ifdef CONFIG_SMP
|
|
if (cpu >= nr_cpu_ids)
|
|
return BAD_APICID;
|
|
return (int)cpu_2_logical_apicid[cpu];
|
|
#else
|
|
return logical_smp_processor_id();
|
|
#endif
|
|
}
|
|
|
|
static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
|
|
{
|
|
/* For clustered we don't have a good way to do this yet - hack */
|
|
return physids_promote(0xff);
|
|
}
|
|
|
|
static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
|
|
{
|
|
boot_cpu_physical_apicid = read_apic_id();
|
|
return (1);
|
|
}
|
|
|
|
static unsigned int
|
|
es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
|
|
{
|
|
int cpus_found = 0;
|
|
int num_bits_set;
|
|
int apicid;
|
|
int cpu;
|
|
|
|
num_bits_set = cpumask_weight(cpumask);
|
|
/* Return id to all */
|
|
if (num_bits_set == nr_cpu_ids)
|
|
return 0xFF;
|
|
/*
|
|
* The cpus in the mask must all be on the apic cluster. If are not
|
|
* on the same apicid cluster return default value of target_cpus():
|
|
*/
|
|
cpu = cpumask_first(cpumask);
|
|
apicid = es7000_cpu_to_logical_apicid(cpu);
|
|
|
|
while (cpus_found < num_bits_set) {
|
|
if (cpumask_test_cpu(cpu, cpumask)) {
|
|
int new_apicid = es7000_cpu_to_logical_apicid(cpu);
|
|
|
|
if (apicid_cluster(apicid) !=
|
|
apicid_cluster(new_apicid)) {
|
|
printk ("%s: Not a valid mask!\n", __func__);
|
|
|
|
return 0xFF;
|
|
}
|
|
apicid = new_apicid;
|
|
cpus_found++;
|
|
}
|
|
cpu++;
|
|
}
|
|
return apicid;
|
|
}
|
|
|
|
static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
|
|
{
|
|
int cpus_found = 0;
|
|
int num_bits_set;
|
|
int apicid;
|
|
int cpu;
|
|
|
|
num_bits_set = cpus_weight(*cpumask);
|
|
/* Return id to all */
|
|
if (num_bits_set == nr_cpu_ids)
|
|
return es7000_cpu_to_logical_apicid(0);
|
|
/*
|
|
* The cpus in the mask must all be on the apic cluster. If are not
|
|
* on the same apicid cluster return default value of target_cpus():
|
|
*/
|
|
cpu = first_cpu(*cpumask);
|
|
apicid = es7000_cpu_to_logical_apicid(cpu);
|
|
while (cpus_found < num_bits_set) {
|
|
if (cpu_isset(cpu, *cpumask)) {
|
|
int new_apicid = es7000_cpu_to_logical_apicid(cpu);
|
|
|
|
if (apicid_cluster(apicid) !=
|
|
apicid_cluster(new_apicid)) {
|
|
printk ("%s: Not a valid mask!\n", __func__);
|
|
|
|
return es7000_cpu_to_logical_apicid(0);
|
|
}
|
|
apicid = new_apicid;
|
|
cpus_found++;
|
|
}
|
|
cpu++;
|
|
}
|
|
return apicid;
|
|
}
|
|
|
|
static unsigned int
|
|
es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
|
|
const struct cpumask *andmask)
|
|
{
|
|
int apicid = es7000_cpu_to_logical_apicid(0);
|
|
cpumask_var_t cpumask;
|
|
|
|
if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
|
|
return apicid;
|
|
|
|
cpumask_and(cpumask, inmask, andmask);
|
|
cpumask_and(cpumask, cpumask, cpu_online_mask);
|
|
apicid = es7000_cpu_mask_to_apicid(cpumask);
|
|
|
|
free_cpumask_var(cpumask);
|
|
|
|
return apicid;
|
|
}
|
|
|
|
static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
|
|
{
|
|
return cpuid_apic >> index_msb;
|
|
}
|
|
|
|
void __init es7000_update_genapic_to_cluster(void)
|
|
{
|
|
apic->target_cpus = target_cpus_cluster;
|
|
apic->irq_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
|
|
apic->irq_dest_mode = INT_DEST_MODE_CLUSTER;
|
|
|
|
apic->init_apic_ldr = es7000_init_apic_ldr_cluster;
|
|
|
|
apic->cpu_mask_to_apicid = es7000_cpu_mask_to_apicid_cluster;
|
|
}
|
|
|
|
static int probe_es7000(void)
|
|
{
|
|
/* probed later in mptable/ACPI hooks */
|
|
return 0;
|
|
}
|
|
|
|
static __init int
|
|
es7000_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
|
|
{
|
|
if (mpc->oemptr) {
|
|
struct mpc_oemtable *oem_table =
|
|
(struct mpc_oemtable *)mpc->oemptr;
|
|
|
|
if (!strncmp(oem, "UNISYS", 6))
|
|
return parse_unisys_oem((char *)oem_table);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_ACPI
|
|
/* Hook from generic ACPI tables.c */
|
|
static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
|
|
{
|
|
unsigned long oem_addr = 0;
|
|
int check_dsdt;
|
|
int ret = 0;
|
|
|
|
/* check dsdt at first to avoid clear fix_map for oem_addr */
|
|
check_dsdt = es7000_check_dsdt();
|
|
|
|
if (!find_unisys_acpi_oem_table(&oem_addr)) {
|
|
if (check_dsdt)
|
|
ret = parse_unisys_oem((char *)oem_addr);
|
|
else {
|
|
setup_unisys();
|
|
ret = 1;
|
|
}
|
|
/*
|
|
* we need to unmap it
|
|
*/
|
|
unmap_unisys_acpi_oem_table(oem_addr);
|
|
}
|
|
return ret;
|
|
}
|
|
#else
|
|
static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
|
|
struct genapic apic_es7000 = {
|
|
|
|
.name = "es7000",
|
|
.probe = probe_es7000,
|
|
.acpi_madt_oem_check = es7000_acpi_madt_oem_check,
|
|
.apic_id_registered = es7000_apic_id_registered,
|
|
|
|
.irq_delivery_mode = dest_Fixed,
|
|
/* phys delivery to target CPUs: */
|
|
.irq_dest_mode = 0,
|
|
|
|
.target_cpus = es7000_target_cpus,
|
|
.disable_esr = 1,
|
|
.dest_logical = 0,
|
|
.check_apicid_used = es7000_check_apicid_used,
|
|
.check_apicid_present = es7000_check_apicid_present,
|
|
|
|
.vector_allocation_domain = es7000_vector_allocation_domain,
|
|
.init_apic_ldr = es7000_init_apic_ldr,
|
|
|
|
.ioapic_phys_id_map = es7000_ioapic_phys_id_map,
|
|
.setup_apic_routing = es7000_setup_apic_routing,
|
|
.multi_timer_check = NULL,
|
|
.apicid_to_node = es7000_apicid_to_node,
|
|
.cpu_to_logical_apicid = es7000_cpu_to_logical_apicid,
|
|
.cpu_present_to_apicid = es7000_cpu_present_to_apicid,
|
|
.apicid_to_cpu_present = es7000_apicid_to_cpu_present,
|
|
.setup_portio_remap = NULL,
|
|
.check_phys_apicid_present = es7000_check_phys_apicid_present,
|
|
.enable_apic_mode = es7000_enable_apic_mode,
|
|
.phys_pkg_id = es7000_phys_pkg_id,
|
|
.mps_oem_check = es7000_mps_oem_check,
|
|
|
|
.get_apic_id = es7000_get_apic_id,
|
|
.set_apic_id = NULL,
|
|
.apic_id_mask = 0xFF << 24,
|
|
|
|
.cpu_mask_to_apicid = es7000_cpu_mask_to_apicid,
|
|
.cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and,
|
|
|
|
.send_IPI_mask = es7000_send_IPI_mask,
|
|
.send_IPI_mask_allbutself = NULL,
|
|
.send_IPI_allbutself = es7000_send_IPI_allbutself,
|
|
.send_IPI_all = es7000_send_IPI_all,
|
|
.send_IPI_self = NULL,
|
|
|
|
.wakeup_cpu = NULL,
|
|
|
|
.trampoline_phys_low = 0x467,
|
|
.trampoline_phys_high = 0x469,
|
|
|
|
.wait_for_init_deassert = es7000_wait_for_init_deassert,
|
|
|
|
/* Nothing to do for most platforms, since cleared by the INIT cycle: */
|
|
.smp_callin_clear_local_apic = NULL,
|
|
.store_NMI_vector = NULL,
|
|
.inquire_remote_apic = default_inquire_remote_apic,
|
|
};
|