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When restoring guest state after another VCPU has run, be sure to clear CP0_LLAddr.LLB in order to break any interrupted atomic critical section. Without this SMP guest atomics don't work when LLB is present as one guest can complete the atomic section started by another guest. MIPS VZ guest read of CP0_LLAddr causes Guest Privileged Sensitive Instruction (GPSI) exception due to the address being root physical. Handle this by reporting only the LLB bit, which contains the bit for whether a ll/sc atomic is in progress without any reason for failure. Similarly on P5600 a guest write to CP0_LLAddr also causes a GPSI exception. Handle this also by clearing the guest LLB bit from root mode. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org |
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| .. | ||
| 00README.txt | ||
| callback.c | ||
| commpage.c | ||
| commpage.h | ||
| dyntrans.c | ||
| emulate.c | ||
| entry.c | ||
| fpu.S | ||
| hypcall.c | ||
| interrupt.c | ||
| interrupt.h | ||
| Kconfig | ||
| Makefile | ||
| mips.c | ||
| mmu.c | ||
| msa.S | ||
| stats.c | ||
| tlb.c | ||
| trace.h | ||
| trap_emul.c | ||
| vz.c | ||