Marco Chiappero 27c0f3a14f crypto: qat - test PFVF registers for spurious interrupts on GEN4 ... Spurious PFVF interrupts can happen when either the ISR is invoked without a valid source being set or, otherwise, when no interrupt bit is set in the PFVF register containing the message. The latter test was present for GEN2 devices but missing for GEN4, this patch fills the gap. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>		2022-04-15 16:34:26 +08:00
..
qat_4xxx	crypto: qat - disable registration of algorithms	2022-03-09 15:12:32 +12:00
qat_c3xxx	crypto: qat - fix ETR sources enabled by default on GEN2 devices	2022-04-15 16:34:26 +08:00
qat_c3xxxvf	crypto: qat - config VFs based on ring-to-svc mapping	2021-12-24 14:18:27 +11:00
qat_c62x	crypto: qat - fix ETR sources enabled by default on GEN2 devices	2022-04-15 16:34:26 +08:00
qat_c62xvf	crypto: qat - config VFs based on ring-to-svc mapping	2021-12-24 14:18:27 +11:00
qat_common	crypto: qat - test PFVF registers for spurious interrupts on GEN4	2022-04-15 16:34:26 +08:00
qat_dh895xcc	crypto: qat - fix ETR sources enabled by default on GEN2 devices	2022-04-15 16:34:26 +08:00
qat_dh895xccvf	crypto: qat - config VFs based on ring-to-svc mapping	2021-12-24 14:18:27 +11:00
Kconfig	crypto: qat - introduce support for PFVF block messages	2021-12-24 14:18:26 +11:00
Makefile	crypto: qat - add qat_4xxx driver	2020-11-20 14:45:34 +11:00