Sergei Antonov 9ec35f52c3 mmc: moxart: fix 4-bit bus width and remove 8-bit bus width ... commit 35ca91d133 upstream. According to the datasheet [1] at page 377, 4-bit bus width is turned on by bit 2 of the Bus Width Register. Thus the current bitmask is wrong: define BUS_WIDTH_4 BIT(1) BIT(1) does not work but BIT(2) works. This has been verified on real MOXA hardware with FTSDC010 controller revision 1_6_0. The corrected value of BUS_WIDTH_4 mask collides with: define BUS_WIDTH_8 BIT(2). Additionally, 8-bit bus width mode isn't supported according to the datasheet, so let's remove the corresponding code. [1] https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf Fixes: 1b66e94e6b ("mmc: moxart: Add MOXA ART SD/MMC driver") Signed-off-by: Sergei Antonov <saproj@gmail.com> Cc: Jonas Jensen <jonas.jensen@gmail.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220907205753.1577434-1-saproj@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2022-10-26 13:15:32 +02:00
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card	mmc: block: Use generic_cmd6_time when modifying INAND_CMD38_ARG_EXT_CSD	2022-05-25 08:39:48 +02:00
core	mmc: core: Default to generic_cmd6_time as timeout in __mmc_switch()	2022-05-25 08:39:48 +02:00
host	mmc: moxart: fix 4-bit bus width and remove 8-bit bus width	2022-10-26 13:15:32 +02:00
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Makefile