Thierry Reding 27ed2f7e7c clk: tegra: dfll: Reference CVB table instead of copying data ... Instead of copying parts of the CVB table into a separate structure, keep track of the selected CVB table and directly reference data from it. Signed-off-by: Thierry Reding <treding@nvidia.com>		2016-04-28 12:41:53 +02:00
..
clk-audio-sync.c	clk: tegra: Remove CLK_IS_ROOT	2016-03-02 17:47:19 -08:00
clk-dfll.c	clk: tegra: dfll: Reference CVB table instead of copying data	2016-04-28 12:41:53 +02:00
clk-dfll.h	clk: tegra: dfll: Reference CVB table instead of copying data	2016-04-28 12:41:53 +02:00
clk-divider.c	tegra/clk-divider: fix wrong do_div() usage	2015-11-16 12:37:55 -05:00
clk-emc.c	clk: tegra: Add missing of_node_put()	2016-02-02 15:49:28 +01:00
clk-id.h	clk: tegra: Add sor_safe clock	2016-04-28 12:41:50 +02:00
clk-periph-fixed.c	clk: tegra: Add fixed factor peripheral clock type	2016-04-28 12:41:47 +02:00
clk-periph-gate.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk-periph.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk-pll-out.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-pll.c	clk: tegra: Fix pllre Tegra210 and add pll_re_out1	2016-04-28 12:41:50 +02:00
clk-super.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra-audio.c	clk: tegra: Modify tegra_audio_clk_init to accept more plls	2015-10-20 13:56:55 +02:00
clk-tegra-fixed.c	clk: tegra: Remove trailing blank line	2016-04-28 12:41:45 +02:00
clk-tegra-periph.c	clk: tegra: dpaux and dpaux1 are fixed factor clocks	2016-04-28 12:41:49 +02:00
clk-tegra-pmc.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra-super-gen4.c	clk: tegra: super: Fix sparse warnings for functions not declared as static	2016-02-02 15:49:34 +01:00
clk-tegra20.c	clk: tegra: Remove CLK_IS_ROOT	2016-03-02 17:47:19 -08:00
clk-tegra30.c	clk: tegra: Fix PLL_U post divider and initial rate on Tegra30	2016-04-28 12:41:52 +02:00
clk-tegra114.c	clk: tegra: Special-case mipi-cal parent on Tegra114	2016-04-28 12:41:46 +02:00
clk-tegra124-dfll-fcpu.c	clk: tegra: dfll: Reference CVB table instead of copying data	2016-04-28 12:41:53 +02:00
clk-tegra124.c	clk: tegra: dpaux and dpaux1 are fixed factor clocks	2016-04-28 12:41:49 +02:00
clk-tegra210.c	clk: tegra: Fix pllre Tegra210 and add pll_re_out1	2016-04-28 12:41:50 +02:00
clk.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk.h	clk: tegra: Fix pllre Tegra210 and add pll_re_out1	2016-04-28 12:41:50 +02:00
cvb.c	clk: tegra: Unlock top rates for Tegra124 DFLL clock	2015-09-15 12:54:39 +02:00
cvb.h	clk: tegra: Add functions for parsing CVB tables	2015-07-16 09:32:47 +02:00
Kconfig	clk: tegra: EMC clock driver depends on EMC driver	2015-05-13 15:17:13 +02:00
Makefile	clk: tegra: Add fixed factor peripheral clock type	2016-04-28 12:41:47 +02:00