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12c3dca25d
The MaverickCrunch support for ep93xx never made it into glibc and was removed from gcc in its 4.8 release in 2012. It is now one of the last parts of arch/arm/ that fails to build with the clang integrated assembler, which is unlikely to ever want to support it. The two alternatives are to force the use of binutils/gas when building the crunch support, or to remove it entirely. According to Hartley Sweeten: "Martin Guy did a lot of work trying to get the maverick crunch working but I was never able to successfully use it for anything. It "kind" of works but depending on the EP93xx silicon revision there are still a number of hardware bugs that either give imprecise or garbage results. I have no problem with removing the kernel support for the maverick crunch." Unless someone else comes up with a good reason to keep it around, remove it now. This touches mostly the ep93xx platform, but removes a bit of code from ARM common ptrace and signal frame handling as well. If there are remaining users of MaverickCrunch, they can use LTS kernels for at least another five years before kernel support ends. Link: https://lore.kernel.org/linux-arm-kernel/20210802141245.1146772-1-arnd@kernel.org/ Link: https://lore.kernel.org/linux-arm-kernel/20210226164345.3889993-1-arnd@kernel.org/ Link: https://github.com/ClangBuiltLinux/linux/issues/1272 Link: https://gcc.gnu.org/legacy-ml/gcc/2008-03/msg01063.html Cc: "Martin Guy" <martinwguy@martinwguy@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
163 lines
4.2 KiB
C
163 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* arch/arm/include/asm/ptrace.h
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*
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* Copyright (C) 1996-2003 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _UAPI__ASM_ARM_PTRACE_H
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#define _UAPI__ASM_ARM_PTRACE_H
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#include <asm/hwcap.h>
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* PTRACE_ATTACH is 16 */
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/* PTRACE_DETACH is 17 */
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#define PTRACE_GETWMMXREGS 18
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#define PTRACE_SETWMMXREGS 19
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/* 20 is unused */
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#define PTRACE_OLDSETOPTIONS 21
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#define PTRACE_GET_THREAD_AREA 22
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#define PTRACE_SET_SYSCALL 23
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/* PTRACE_SYSCALL is 24 */
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#define PTRACE_GETCRUNCHREGS 25 /* obsolete */
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#define PTRACE_SETCRUNCHREGS 26 /* obsolete */
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#define PTRACE_GETVFPREGS 27
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#define PTRACE_SETVFPREGS 28
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#define PTRACE_GETHBPREGS 29
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#define PTRACE_SETHBPREGS 30
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#define PTRACE_GETFDPIC 31
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#define PTRACE_GETFDPIC_EXEC 0
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#define PTRACE_GETFDPIC_INTERP 1
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/*
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* PSR bits
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* Note on V7M there is no mode contained in the PSR
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*/
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#define USR26_MODE 0x00000000
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#define FIQ26_MODE 0x00000001
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#define IRQ26_MODE 0x00000002
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#define SVC26_MODE 0x00000003
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#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
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/*
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* Use 0 here to get code right that creates a userspace
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* or kernel space thread.
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*/
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#define USR_MODE 0x00000000
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#define SVC_MODE 0x00000000
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#else
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#define USR_MODE 0x00000010
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#define SVC_MODE 0x00000013
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#endif
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#define FIQ_MODE 0x00000011
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#define IRQ_MODE 0x00000012
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#define MON_MODE 0x00000016
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#define ABT_MODE 0x00000017
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#define HYP_MODE 0x0000001a
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#define UND_MODE 0x0000001b
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#define SYSTEM_MODE 0x0000001f
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#define MODE32_BIT 0x00000010
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#define MODE_MASK 0x0000001f
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#define V4_PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */
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#define V7M_PSR_T_BIT 0x01000000
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#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
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#define PSR_T_BIT V7M_PSR_T_BIT
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#else
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/* for compatibility */
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#define PSR_T_BIT V4_PSR_T_BIT
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#endif
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#define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */
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#define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */
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#define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */
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#define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */
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#define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */
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#define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */
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#define PSR_V_BIT 0x10000000
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#define PSR_C_BIT 0x20000000
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#define PSR_Z_BIT 0x40000000
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#define PSR_N_BIT 0x80000000
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/*
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* Groups of PSR bits
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*/
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#define PSR_f 0xff000000 /* Flags */
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#define PSR_s 0x00ff0000 /* Status */
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#define PSR_x 0x0000ff00 /* Extension */
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#define PSR_c 0x000000ff /* Control */
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/*
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* ARMv7 groups of PSR bits
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*/
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#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
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#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
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#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
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#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
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/*
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* Default endianness state
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*/
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#ifdef CONFIG_CPU_ENDIAN_BE8
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#define PSR_ENDSTATE PSR_E_BIT
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#else
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#define PSR_ENDSTATE 0
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#endif
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/*
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* These are 'magic' values for PTRACE_PEEKUSR that return info about where a
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* process is located in memory.
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*/
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#define PT_TEXT_ADDR 0x10000
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#define PT_DATA_ADDR 0x10004
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#define PT_TEXT_END_ADDR 0x10008
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#ifndef __ASSEMBLY__
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/*
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* This struct defines the way the registers are stored on the
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* stack during a system call. Note that sizeof(struct pt_regs)
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* has to be a multiple of 8.
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*/
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#ifndef __KERNEL__
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struct pt_regs {
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long uregs[18];
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};
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#endif /* __KERNEL__ */
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#define ARM_cpsr uregs[16]
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#define ARM_pc uregs[15]
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#define ARM_lr uregs[14]
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#define ARM_sp uregs[13]
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#define ARM_ip uregs[12]
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#define ARM_fp uregs[11]
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#define ARM_r10 uregs[10]
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#define ARM_r9 uregs[9]
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#define ARM_r8 uregs[8]
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#define ARM_r7 uregs[7]
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#define ARM_r6 uregs[6]
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#define ARM_r5 uregs[5]
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#define ARM_r4 uregs[4]
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#define ARM_r3 uregs[3]
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#define ARM_r2 uregs[2]
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#define ARM_r1 uregs[1]
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#define ARM_r0 uregs[0]
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#define ARM_ORIG_r0 uregs[17]
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/*
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* The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
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* and core dumps.
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*/
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#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
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#endif /* __ASSEMBLY__ */
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#endif /* _UAPI__ASM_ARM_PTRACE_H */
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