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425fc47adb
PTRACE_SINGLESTEP is a ptrace request designed to offer single-stepping support to userspace when the underlying architecture has hardware support for this operation. On ARM, we set arch_has_single_step() to 1 and attempt to emulate hardware single-stepping by disassembling the current instruction to determine the next pc and placing a software breakpoint on that location. Unfortunately this has the following problems: 1.) Only a subset of ARMv7 instructions are supported 2.) Thumb-2 is unsupported 3.) The code is not SMP safe We could try to fix this code, but it turns out that because of the above issues it is rarely used in practice. GDB, for example, uses PTRACE_POKETEXT and PTRACE_PEEKTEXT to manage breakpoints itself and does not require any kernel assistance. This patch removes the single-step emulation code from ptrace meaning that the PTRACE_SINGLESTEP request will return -EIO on ARM. Portable code must check the return value from a ptrace call and handle the failure gracefully. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
128 lines
3 KiB
C
128 lines
3 KiB
C
/*
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* arch/arm/include/asm/processor.h
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_PROCESSOR_H
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#define __ASM_ARM_PROCESSOR_H
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ __label__ _l; _l: &&_l;})
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#ifdef __KERNEL__
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#include <asm/hw_breakpoint.h>
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#include <asm/ptrace.h>
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#include <asm/types.h>
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#ifdef __KERNEL__
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#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
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TASK_SIZE : TASK_SIZE_26)
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#define STACK_TOP_MAX TASK_SIZE
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#endif
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struct debug_info {
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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struct perf_event *hbp[ARM_MAX_HBP_SLOTS];
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#endif
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};
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struct thread_struct {
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/* fault info */
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unsigned long address;
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unsigned long trap_no;
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unsigned long error_code;
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/* debugging */
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struct debug_info debug;
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};
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#define INIT_THREAD { }
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#ifdef CONFIG_MMU
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#define nommu_start_thread(regs) do { } while (0)
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#else
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#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
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#endif
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#define start_thread(regs,pc,sp) \
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({ \
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unsigned long *stack = (unsigned long *)sp; \
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set_fs(USER_DS); \
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memset(regs->uregs, 0, sizeof(regs->uregs)); \
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if (current->personality & ADDR_LIMIT_32BIT) \
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regs->ARM_cpsr = USR_MODE; \
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else \
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regs->ARM_cpsr = USR26_MODE; \
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if (elf_hwcap & HWCAP_THUMB && pc & 1) \
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regs->ARM_cpsr |= PSR_T_BIT; \
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regs->ARM_cpsr |= PSR_ENDSTATE; \
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regs->ARM_pc = pc & ~1; /* pc */ \
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regs->ARM_sp = sp; /* sp */ \
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regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
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regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
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regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
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nommu_start_thread(regs); \
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})
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/* Forward declaration, a strange C thing */
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struct task_struct;
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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/* Prepare to copy thread state - unlazy all lazy status */
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#define prepare_to_copy(tsk) do { } while (0)
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unsigned long get_wchan(struct task_struct *p);
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#if __LINUX_ARM_ARCH__ == 6
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#define cpu_relax() smp_mb()
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#else
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#define cpu_relax() barrier()
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#endif
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/*
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* Create a new kernel thread
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*/
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extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
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#define task_pt_regs(p) \
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((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
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#define KSTK_EIP(tsk) task_pt_regs(tsk)->ARM_pc
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#define KSTK_ESP(tsk) task_pt_regs(tsk)->ARM_sp
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/*
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* Prefetching support - only ARMv5.
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*/
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#if __LINUX_ARM_ARCH__ >= 5
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#define ARCH_HAS_PREFETCH
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static inline void prefetch(const void *ptr)
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{
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__asm__ __volatile__(
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"pld\t%a0"
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:
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: "p" (ptr)
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: "cc");
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}
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#define ARCH_HAS_PREFETCHW
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#define prefetchw(ptr) prefetch(ptr)
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#define ARCH_HAS_SPINLOCK_PREFETCH
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#define spin_lock_prefetch(x) do { } while (0)
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#endif
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#endif
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#endif /* __ASM_ARM_PROCESSOR_H */
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