Gregory CLEMENT 292a3546b9 ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-level ... For L2 cache controller node, cache-level property is mandatory. Let's add it to Armada 370 and Armada XP device tree. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>		2015-03-19 11:07:47 +01:00
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compressed	Merge branches 'debug', 'fixes', 'l2c' (early part), 'misc' and 'sa1100' into for-next	2015-02-10 10:26:27 +00:00
dts	ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-level	2015-03-19 11:07:47 +01:00
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