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c1fe8d054c
This is one of the last platforms using the old entry path. While this code path is spread over a few files, it is fairly straightforward to convert it into an equivalent C version, leaving the existing algorithm and all the priority handling the same. Unlike most irqchip drivers, this means reading the status register(s) in a loop and always handling the highest-priority irq first. The IOMD_IRQREQC and IOMD_IRQREQD registers are not actaully used here, but I left the code in place for the time being, to keep the conversion as direct as possible. It could be removed in a cleanup on top. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [ardb: drop obsolete IOMD_IRQREQC/IOMD_IRQREQD handling] Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M
18 lines
437 B
ArmAsm
18 lines
437 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <mach/hardware.h>
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.equ ioc_base_high, IOC_BASE & 0xff000000
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.equ ioc_base_low, IOC_BASE & 0x00ff0000
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.text
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.global rpc_default_fiq_end
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ENTRY(rpc_default_fiq_start)
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mov r12, #ioc_base_high
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.if ioc_base_low
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orr r12, r12, #ioc_base_low
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.endif
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strb r12, [r12, #0x38] @ Disable FIQ register
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subs pc, lr, #4
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rpc_default_fiq_end:
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