Pawan Gupta 293649307e x86/tsx: Clear CPUID bits when TSX always force aborts ... As a result of TSX deprecation, some processors always abort TSX transactions by default after a microcode update. When TSX feature cannot be used it is better to hide it. Clear CPUID.RTM and CPUID.HLE bits when TSX transactions always abort. [ bp: Massage commit message and comments. ] Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Neelima Krishnan <neelima.krishnan@intel.com> Link: https://lkml.kernel.org/r/5209b3d72ffe5bd3cafdcc803f5b883f785329c3.1623704845.git-series.pawan.kumar.gupta@linux.intel.com		2021-06-15 17:46:48 +02:00
..
mce	- turn the stack canary into a normal __percpu variable on 32-bit which	2021-04-27 17:45:09 -07:00
microcode	x86/microcode: Check for offline CPUs before requesting new microcode	2021-03-22 22:29:40 +01:00
mtrr	x86: Fix various typos in comments, take #2	2021-03-21 23:50:28 +01:00
resctrl	x86/resctrl: Fix init const confusion	2021-05-05 21:50:14 +02:00
sgx	Trivial cleanups and fixes all over the place.	2021-04-26 09:25:47 -07:00
.gitignore	.gitignore: add SPDX License Identifier	2020-03-25 11:50:48 +01:00
acrn.c	x86/acrn: Introduce acrn_cpuid_base() and hypervisor feature bits	2021-02-09 10:58:18 +01:00
amd.c	perf/x86/rapl: Use CPUID bit on AMD and Hygon parts	2021-06-01 21:10:33 +02:00
aperfmperf.c	x86/cpu: Avoid cpuinfo-induced IPIing of idle CPUs	2020-11-06 16:59:11 -08:00
bugs.c	x86/speculation: Fix prctl() when spectre_v2_user={seccomp,prctl},ibpb	2020-11-25 20:17:09 +01:00
cacheinfo.c	x86/cacheinfo: Remove unneeded dead-store initialization	2021-04-07 21:12:12 +02:00
centaur.c	x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support	2020-09-11 10:53:19 +02:00
common.c	x86/cpu: Remove write_tsc() and write_rdtscp_aux() wrappers	2021-05-05 21:50:14 +02:00
cpu.h	x86/tsx: Clear CPUID bits when TSX always force aborts	2021-06-15 17:46:48 +02:00
cpuid-deps.c	x86/cpufeatures: Add SGX1 and SGX2 sub-features	2021-03-25 17:33:11 +01:00
cyrix.c	x86: Fix various typos in comments	2021-03-18 15:31:53 +01:00
feat_ctl.c	x86/cpu/intel: Allow SGX virtualization without Launch Control support	2021-04-06 09:43:41 +02:00
hygon.c	perf/x86/rapl: Use CPUID bit on AMD and Hygon parts	2021-06-01 21:10:33 +02:00
hypervisor.c	x86/paravirt: Remove const mark from x86_hyper_xen_hvm variable	2019-07-17 08:09:59 +02:00
intel.c	x86/tsx: Clear CPUID bits when TSX always force aborts	2021-06-15 17:46:48 +02:00
intel_epb.c	x86: intel_epb: Do not build when CONFIG_PM is unset	2019-05-30 10:58:36 +02:00
intel_pconfig.c
Makefile	x86/sgx: Initialize metadata for Enclave Page Cache (EPC) sections	2020-11-17 14:36:13 +01:00
match.c	x86/cpu: Add a steppings field to struct x86_cpu_id	2020-04-20 12:19:21 +02:00
mkcapflags.sh	x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_*	2020-01-13 18:36:02 +01:00
mshyperv.c	hyperv-next for 5.13	2021-04-26 10:44:16 -07:00
perfctr-watchdog.c	arch: x86: Remove CONFIG_OPROFILE support	2021-01-29 10:05:51 +05:30
powerflags.c
proc.c	x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_*	2020-01-13 18:36:02 +01:00
rdrand.c	x86/rdrand: Sanity-check RDRAND output	2019-10-01 19:55:32 +02:00
scattered.c	x86/cpufeatures: Add SGX1 and SGX2 sub-features	2021-03-25 17:33:11 +01:00
topology.c	x86: Fix various typos in comments	2021-03-18 15:31:53 +01:00
transmeta.c
tsx.c	x86/tsx: Clear CPUID bits when TSX always force aborts	2021-06-15 17:46:48 +02:00
umc.c
umwait.c	KVM: VMX: Stop context switching MSR_IA32_UMWAIT_CONTROL	2020-06-22 20:54:57 -04:00
vmware.c	Have vmware guests skip the refined TSC calibration when the TSC	2021-04-26 09:13:43 -07:00
zhaoxin.c	x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup	2020-06-15 14:18:37 +02:00