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This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4755-cgu driver. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Link: https://lore.kernel.org/r/20221027192024.484320-3-lis8215@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
49 lines
1.3 KiB
C
49 lines
1.3 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* This header provides clock numbers for the ingenic,jz4755-cgu DT binding.
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*/
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#ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
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#define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
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#define JZ4755_CLK_EXT 0
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#define JZ4755_CLK_OSC32K 1
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#define JZ4755_CLK_PLL 2
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#define JZ4755_CLK_PLL_HALF 3
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#define JZ4755_CLK_EXT_HALF 4
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#define JZ4755_CLK_CCLK 5
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#define JZ4755_CLK_H0CLK 6
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#define JZ4755_CLK_PCLK 7
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#define JZ4755_CLK_MCLK 8
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#define JZ4755_CLK_H1CLK 9
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#define JZ4755_CLK_UDC 10
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#define JZ4755_CLK_LCD 11
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#define JZ4755_CLK_UART0 12
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#define JZ4755_CLK_UART1 13
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#define JZ4755_CLK_UART2 14
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#define JZ4755_CLK_DMA 15
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#define JZ4755_CLK_MMC 16
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#define JZ4755_CLK_MMC0 17
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#define JZ4755_CLK_MMC1 18
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#define JZ4755_CLK_EXT512 19
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#define JZ4755_CLK_RTC 20
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#define JZ4755_CLK_UDC_PHY 21
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#define JZ4755_CLK_I2S 22
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#define JZ4755_CLK_SPI 23
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#define JZ4755_CLK_AIC 24
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#define JZ4755_CLK_ADC 25
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#define JZ4755_CLK_TCU 26
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#define JZ4755_CLK_BCH 27
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#define JZ4755_CLK_I2C 28
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#define JZ4755_CLK_TVE 29
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#define JZ4755_CLK_CIM 30
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#define JZ4755_CLK_AUX_CPU 31
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#define JZ4755_CLK_AHB1 32
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#define JZ4755_CLK_IDCT 33
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#define JZ4755_CLK_DB 34
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#define JZ4755_CLK_ME 35
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#define JZ4755_CLK_MC 36
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#define JZ4755_CLK_TSSI 37
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#define JZ4755_CLK_IPU 38
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#endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */
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