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7b91b9d8cc
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6350 SoCs. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220222011534.3502-3-konrad.dybcio@somainline.org
37 lines
1 KiB
C
37 lines
1 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6350_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6350_H
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/* GPU_CC clocks */
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#define GPU_CC_PLL0 0
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#define GPU_CC_PLL1 1
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#define GPU_CC_ACD_AHB_CLK 2
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#define GPU_CC_ACD_CXO_CLK 3
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#define GPU_CC_AHB_CLK 4
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#define GPU_CC_CRC_AHB_CLK 5
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#define GPU_CC_CX_GFX3D_CLK 6
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#define GPU_CC_CX_GFX3D_SLV_CLK 7
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#define GPU_CC_CX_GMU_CLK 8
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#define GPU_CC_CX_SNOC_DVM_CLK 9
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#define GPU_CC_CXO_AON_CLK 10
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#define GPU_CC_CXO_CLK 11
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#define GPU_CC_GMU_CLK_SRC 12
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#define GPU_CC_GX_CXO_CLK 13
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#define GPU_CC_GX_GFX3D_CLK 14
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#define GPU_CC_GX_GFX3D_CLK_SRC 15
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#define GPU_CC_GX_GMU_CLK 16
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#define GPU_CC_GX_VSENSE_CLK 17
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/* CLK_HW */
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#define GPU_CC_CRC_DIV 0
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/* GDSCs */
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#define GPU_CX_GDSC 0
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#define GPU_GX_GDSC 1
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#endif
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