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fde35c9c7d
Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module Standby. The Module Standby HW in the RZ/A series is very close to R-Car HW, except for how the registers are laid out. The MSTP registers are only 8-bits wide, there are no status registers (MSTPSR), and the register offsets are a little different. Since the RZ/A hardware manuals refer to these registers as the Standby Control Registers, we'll use that name to distinguish the RZ/A type from the R-Car type. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Rob Herring <robh@kernel.org> # DT bits Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
20 lines
488 B
C
20 lines
488 B
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2018 Renesas Electronics Corp.
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*
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*/
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#ifndef __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
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#define __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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/* R7S9210 CPG Core Clocks */
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#define R7S9210_CLK_I 0
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#define R7S9210_CLK_G 1
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#define R7S9210_CLK_B 2
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#define R7S9210_CLK_P1 3
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#define R7S9210_CLK_P1C 4
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#define R7S9210_CLK_P0 5
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#endif /* __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ */
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