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![Geert Uytterhoeven](/assets/img/avatar_default.png)
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added the CPEX clock on R-Car D3. This clock can be selected as a clock source for CMT1 (Compare Match Timer Type 1). Add the missing clock to the DT bindings header, and implement support for it in the clock driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
54 lines
1.5 KiB
C
54 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+
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*
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* Copyright (C) 2017 Glider bvba
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
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#define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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/* r8a77995 CPG Core Clocks */
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#define R8A77995_CLK_Z2 0
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#define R8A77995_CLK_ZG 1
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#define R8A77995_CLK_ZTR 2
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#define R8A77995_CLK_ZT 3
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#define R8A77995_CLK_ZX 4
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#define R8A77995_CLK_S0D1 5
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#define R8A77995_CLK_S1D1 6
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#define R8A77995_CLK_S1D2 7
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#define R8A77995_CLK_S1D4 8
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#define R8A77995_CLK_S2D1 9
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#define R8A77995_CLK_S2D2 10
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#define R8A77995_CLK_S2D4 11
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#define R8A77995_CLK_S3D1 12
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#define R8A77995_CLK_S3D2 13
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#define R8A77995_CLK_S3D4 14
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#define R8A77995_CLK_S1D4C 15
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#define R8A77995_CLK_S3D1C 16
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#define R8A77995_CLK_S3D2C 17
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#define R8A77995_CLK_S3D4C 18
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#define R8A77995_CLK_LB 19
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#define R8A77995_CLK_CL 20
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#define R8A77995_CLK_ZB3 21
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#define R8A77995_CLK_ZB3D2 22
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#define R8A77995_CLK_CR 23
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#define R8A77995_CLK_CRD2 24
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#define R8A77995_CLK_SD0H 25
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#define R8A77995_CLK_SD0 26
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/* CLK_SSP2 was removed */
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/* CLK_SSP1 was removed */
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#define R8A77995_CLK_RPC 29
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#define R8A77995_CLK_RPCD2 30
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#define R8A77995_CLK_ZA2 31
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#define R8A77995_CLK_ZA8 32
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#define R8A77995_CLK_Z2D 33
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#define R8A77995_CLK_CANFD 34
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#define R8A77995_CLK_MSO 35
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#define R8A77995_CLK_R 36
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#define R8A77995_CLK_OSC 37
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#define R8A77995_CLK_LV0 38
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#define R8A77995_CLK_LV1 39
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#define R8A77995_CLK_CP 40
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#define R8A77995_CLK_CPEX 41
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#endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */
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