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![Thomas Gleixner](/assets/img/avatar_default.png)
cycle_kernel_lock() was added during the big BKL pushdown. It should ensure the serializiation against driver init code. In this case there is nothing to serialize. Remove it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <20091010153350.127093710@linutronix.de> Acked-by: Jim Cromie <jim.cromie@gmail.com>
352 lines
8.8 KiB
C
352 lines
8.8 KiB
C
/* linux/drivers/char/pc8736x_gpio.c
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National Semiconductor PC8736x GPIO driver. Allows a user space
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process to play with the GPIO pins.
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Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com>
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adapted from linux/drivers/char/scx200_gpio.c
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Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>,
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*/
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#include <linux/fs.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/cdev.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/mutex.h>
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#include <linux/nsc_gpio.h>
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#include <linux/platform_device.h>
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#include <asm/uaccess.h>
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#define DEVNAME "pc8736x_gpio"
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MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
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MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver");
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MODULE_LICENSE("GPL");
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static int major; /* default to dynamic major */
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module_param(major, int, 0);
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MODULE_PARM_DESC(major, "Major device number");
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static DEFINE_MUTEX(pc8736x_gpio_config_lock);
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static unsigned pc8736x_gpio_base;
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static u8 pc8736x_gpio_shadow[4];
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#define SIO_BASE1 0x2E /* 1st command-reg to check */
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#define SIO_BASE2 0x4E /* alt command-reg to check */
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#define SIO_SID 0x20 /* SuperI/O ID Register */
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#define SIO_SID_PC87365 0xe5 /* Expected value in ID Register for PC87365 */
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#define SIO_SID_PC87366 0xe9 /* Expected value in ID Register for PC87366 */
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#define SIO_CF1 0x21 /* chip config, bit0 is chip enable */
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#define PC8736X_GPIO_RANGE 16 /* ioaddr range */
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#define PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */
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#define SIO_UNIT_SEL 0x7 /* unit select reg */
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#define SIO_UNIT_ACT 0x30 /* unit enable */
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#define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */
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#define SIO_VLM_UNIT 0x0D
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#define SIO_TMS_UNIT 0x0E
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/* config-space addrs to read/write each unit's runtime addr */
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#define SIO_BASE_HADDR 0x60
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#define SIO_BASE_LADDR 0x61
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/* GPIO config-space pin-control addresses */
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#define SIO_GPIO_PIN_SELECT 0xF0
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#define SIO_GPIO_PIN_CONFIG 0xF1
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#define SIO_GPIO_PIN_EVENT 0xF2
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static unsigned char superio_cmd = 0;
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static unsigned char selected_device = 0xFF; /* bogus start val */
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/* GPIO port runtime access, functionality */
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static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */
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/* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */
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#define PORT_OUT 0
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#define PORT_IN 1
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#define PORT_EVT_EN 2
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#define PORT_EVT_STST 3
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static struct platform_device *pdev; /* use in dev_*() */
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static inline void superio_outb(int addr, int val)
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{
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outb_p(addr, superio_cmd);
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outb_p(val, superio_cmd + 1);
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}
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static inline int superio_inb(int addr)
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{
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outb_p(addr, superio_cmd);
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return inb_p(superio_cmd + 1);
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}
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static int pc8736x_superio_present(void)
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{
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int id;
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/* try the 2 possible values, read a hardware reg to verify */
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superio_cmd = SIO_BASE1;
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id = superio_inb(SIO_SID);
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if (id == SIO_SID_PC87365 || id == SIO_SID_PC87366)
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return superio_cmd;
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superio_cmd = SIO_BASE2;
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id = superio_inb(SIO_SID);
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if (id == SIO_SID_PC87365 || id == SIO_SID_PC87366)
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return superio_cmd;
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return 0;
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}
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static void device_select(unsigned devldn)
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{
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superio_outb(SIO_UNIT_SEL, devldn);
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selected_device = devldn;
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}
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static void select_pin(unsigned iminor)
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{
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/* select GPIO port/pin from device minor number */
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device_select(SIO_GPIO_UNIT);
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superio_outb(SIO_GPIO_PIN_SELECT,
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((iminor << 1) & 0xF0) | (iminor & 0x7));
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}
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static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
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u32 func_slct)
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{
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u32 config, new_config;
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mutex_lock(&pc8736x_gpio_config_lock);
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device_select(SIO_GPIO_UNIT);
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select_pin(index);
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/* read current config value */
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config = superio_inb(func_slct);
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/* set new config */
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new_config = (config & mask) | bits;
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superio_outb(func_slct, new_config);
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mutex_unlock(&pc8736x_gpio_config_lock);
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return config;
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}
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static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
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{
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return pc8736x_gpio_configure_fn(index, mask, bits,
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SIO_GPIO_PIN_CONFIG);
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}
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static int pc8736x_gpio_get(unsigned minor)
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{
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int port, bit, val;
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port = minor >> 3;
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bit = minor & 7;
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val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
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val >>= bit;
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val &= 1;
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dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n",
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minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit,
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val);
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return val;
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}
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static void pc8736x_gpio_set(unsigned minor, int val)
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{
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int port, bit, curval;
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minor &= 0x1f;
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port = minor >> 3;
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bit = minor & 7;
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curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
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dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n",
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pc8736x_gpio_base + port_offset[port] + PORT_OUT,
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curval, bit, (curval & ~(1 << bit)), val, (val << bit));
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val = (curval & ~(1 << bit)) | (val << bit);
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dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)"
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" %2x -> %2x\n", minor, port, bit, curval, val);
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outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT);
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curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
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val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
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dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val);
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pc8736x_gpio_shadow[port] = val;
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}
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static int pc8736x_gpio_current(unsigned minor)
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{
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int port, bit;
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minor &= 0x1f;
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port = minor >> 3;
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bit = minor & 7;
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return ((pc8736x_gpio_shadow[port] >> bit) & 0x01);
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}
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static void pc8736x_gpio_change(unsigned index)
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{
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pc8736x_gpio_set(index, !pc8736x_gpio_current(index));
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}
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static struct nsc_gpio_ops pc8736x_gpio_ops = {
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.owner = THIS_MODULE,
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.gpio_config = pc8736x_gpio_configure,
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.gpio_dump = nsc_gpio_dump,
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.gpio_get = pc8736x_gpio_get,
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.gpio_set = pc8736x_gpio_set,
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.gpio_change = pc8736x_gpio_change,
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.gpio_current = pc8736x_gpio_current
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};
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static int pc8736x_gpio_open(struct inode *inode, struct file *file)
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{
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unsigned m = iminor(inode);
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file->private_data = &pc8736x_gpio_ops;
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dev_dbg(&pdev->dev, "open %d\n", m);
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if (m >= PC8736X_GPIO_CT)
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return -EINVAL;
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return nonseekable_open(inode, file);
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}
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static const struct file_operations pc8736x_gpio_fileops = {
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.owner = THIS_MODULE,
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.open = pc8736x_gpio_open,
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.write = nsc_gpio_write,
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.read = nsc_gpio_read,
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};
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static void __init pc8736x_init_shadow(void)
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{
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int port;
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/* read the current values driven on the GPIO signals */
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for (port = 0; port < 4; ++port)
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pc8736x_gpio_shadow[port]
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= inb_p(pc8736x_gpio_base + port_offset[port]
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+ PORT_OUT);
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}
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static struct cdev pc8736x_gpio_cdev;
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static int __init pc8736x_gpio_init(void)
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{
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int rc;
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dev_t devid;
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pdev = platform_device_alloc(DEVNAME, 0);
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if (!pdev)
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return -ENOMEM;
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rc = platform_device_add(pdev);
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if (rc) {
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rc = -ENODEV;
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goto undo_platform_dev_alloc;
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}
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dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n");
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if (!pc8736x_superio_present()) {
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rc = -ENODEV;
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dev_err(&pdev->dev, "no device found\n");
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goto undo_platform_dev_add;
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}
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pc8736x_gpio_ops.dev = &pdev->dev;
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/* Verify that chip and it's GPIO unit are both enabled.
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My BIOS does this, so I take minimum action here
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*/
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rc = superio_inb(SIO_CF1);
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if (!(rc & 0x01)) {
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rc = -ENODEV;
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dev_err(&pdev->dev, "device not enabled\n");
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goto undo_platform_dev_add;
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}
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device_select(SIO_GPIO_UNIT);
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if (!superio_inb(SIO_UNIT_ACT)) {
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rc = -ENODEV;
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dev_err(&pdev->dev, "GPIO unit not enabled\n");
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goto undo_platform_dev_add;
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}
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/* read the GPIO unit base addr that chip responds to */
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pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
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| superio_inb(SIO_BASE_LADDR));
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if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) {
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rc = -ENODEV;
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dev_err(&pdev->dev, "GPIO ioport %x busy\n",
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pc8736x_gpio_base);
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goto undo_platform_dev_add;
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}
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dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base);
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if (major) {
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devid = MKDEV(major, 0);
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rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME);
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} else {
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rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME);
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major = MAJOR(devid);
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}
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if (rc < 0) {
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dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc);
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goto undo_request_region;
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}
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if (!major) {
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major = rc;
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dev_dbg(&pdev->dev, "got dynamic major %d\n", major);
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}
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pc8736x_init_shadow();
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/* ignore minor errs, and succeed */
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cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops);
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cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT);
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return 0;
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undo_request_region:
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release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
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undo_platform_dev_add:
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platform_device_del(pdev);
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undo_platform_dev_alloc:
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platform_device_put(pdev);
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return rc;
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}
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static void __exit pc8736x_gpio_cleanup(void)
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{
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dev_dbg(&pdev->dev, "cleanup\n");
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cdev_del(&pc8736x_gpio_cdev);
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unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT);
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release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
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platform_device_del(pdev);
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platform_device_put(pdev);
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}
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module_init(pc8736x_gpio_init);
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module_exit(pc8736x_gpio_cleanup);
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