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linux-stable/drivers/clk/ingenic
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Harvey Hunt 4afe2d1a6e clk: ingenic: Allow divider value to be divided 
The JZ4780's MSC clock divider registers multiply the clock divider by 2.
This means that MMC devices run at half their expected speed. Add the
ability to divide the clock divider in order to solve this.

Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-05-12 14:48:25 -07:00
..
cgu.c clk: ingenic: Allow divider value to be divided 2016-05-12 14:48:25 -07:00
cgu.h clk: ingenic: Allow divider value to be divided 2016-05-12 14:48:25 -07:00
jz4740-cgu.c clk: ingenic: Allow divider value to be divided 2016-05-12 14:48:25 -07:00
jz4780-cgu.c clk: ingenic: Allow divider value to be divided 2016-05-12 14:48:25 -07:00
Makefile clk: ingenic: add JZ4780 CGU support 2015-06-21 21:53:20 +02:00