mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-11 19:19:42 +00:00
c41166f9a1
At a few points in our uABI, we check to see if the driver is wedged and report -EIO back to the user in that case. However, as we perform the check and reset asynchronously (where once before they were both serialised by the struct_mutex), we may instead see the temporary wedging used to cancel inflight rendering to avoid a deadlock during reset (caused by either us timing out in our reset handler, i915_wedge_on_timeout or with malice aforethought in intel_reset_prepare for a stuck modeset). If we suspect this is the case, that is we see a wedged driver *and* reset in progress, then wait until the reset is resolved before reporting upon the wedged status. v2: might_sleep() (Mika) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109580 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190220145637.23503-1-chris@chris-wilson.co.uk
65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
/*
|
|
* SPDX-License-Identifier: MIT
|
|
*
|
|
* Copyright © 2008-2018 Intel Corporation
|
|
*/
|
|
|
|
#ifndef I915_RESET_H
|
|
#define I915_RESET_H
|
|
|
|
#include <linux/compiler.h>
|
|
#include <linux/types.h>
|
|
#include <linux/srcu.h>
|
|
|
|
struct drm_i915_private;
|
|
struct intel_engine_cs;
|
|
struct intel_guc;
|
|
|
|
__printf(4, 5)
|
|
void i915_handle_error(struct drm_i915_private *i915,
|
|
u32 engine_mask,
|
|
unsigned long flags,
|
|
const char *fmt, ...);
|
|
#define I915_ERROR_CAPTURE BIT(0)
|
|
|
|
void i915_clear_error_registers(struct drm_i915_private *i915);
|
|
|
|
void i915_reset(struct drm_i915_private *i915,
|
|
unsigned int stalled_mask,
|
|
const char *reason);
|
|
int i915_reset_engine(struct intel_engine_cs *engine,
|
|
const char *reason);
|
|
|
|
void i915_reset_request(struct i915_request *rq, bool guilty);
|
|
bool i915_reset_flush(struct drm_i915_private *i915);
|
|
|
|
int __must_check i915_reset_trylock(struct drm_i915_private *i915);
|
|
void i915_reset_unlock(struct drm_i915_private *i915, int tag);
|
|
|
|
int i915_terminally_wedged(struct drm_i915_private *i915);
|
|
|
|
bool intel_has_gpu_reset(struct drm_i915_private *i915);
|
|
bool intel_has_reset_engine(struct drm_i915_private *i915);
|
|
|
|
int intel_gpu_reset(struct drm_i915_private *i915, u32 engine_mask);
|
|
|
|
int intel_reset_guc(struct drm_i915_private *i915);
|
|
|
|
struct i915_wedge_me {
|
|
struct delayed_work work;
|
|
struct drm_i915_private *i915;
|
|
const char *name;
|
|
};
|
|
|
|
void __i915_init_wedge(struct i915_wedge_me *w,
|
|
struct drm_i915_private *i915,
|
|
long timeout,
|
|
const char *name);
|
|
void __i915_fini_wedge(struct i915_wedge_me *w);
|
|
|
|
#define i915_wedge_on_timeout(W, DEV, TIMEOUT) \
|
|
for (__i915_init_wedge((W), (DEV), (TIMEOUT), __func__); \
|
|
(W)->i915; \
|
|
__i915_fini_wedge((W)))
|
|
|
|
#endif /* I915_RESET_H */
|