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0881954965
Introduce a mutex to start locking the HW contexts independently of struct_mutex, with a view to reducing the coarse struct_mutex. The intel_context.pin_mutex is used to guard the transition to and from being pinned on the gpu, and so is required before starting to build any request. The intel_context will then remain pinned until the request completes, but the mutex can be released immediately unpin completion of pinning the context. A slight variant of the above is used by per-context sseu that wants to inspect the pinned status of the context, and requires that it remains stable (either !pinned or pinned) across its operation. By using the pin_mutex to serialise operations while pin_count==0, we can take that pin_mutex for stabilise the boolean pin status. v2: for Tvrtko! * Improved commit message. * Dropped _gpu suffix from gen8_modify_rpcs_gpu. v3: Repair the locking for sseu selftests Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190308132522.21573-7-chris@chris-wilson.co.uk
76 lines
2 KiB
C
76 lines
2 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_CONTEXT_H__
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#define __INTEL_CONTEXT_H__
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#include <linux/lockdep.h>
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#include "intel_context_types.h"
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#include "intel_engine_types.h"
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struct intel_context *intel_context_alloc(void);
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void intel_context_free(struct intel_context *ce);
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void intel_context_init(struct intel_context *ce,
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struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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/**
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* intel_context_lookup - Find the matching HW context for this (ctx, engine)
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* @ctx - the parent GEM context
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* @engine - the target HW engine
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*
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* May return NULL if the HW context hasn't been instantiated (i.e. unused).
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*/
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struct intel_context *
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intel_context_lookup(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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/**
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* intel_context_pin_lock - Stablises the 'pinned' status of the HW context
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* @ctx - the parent GEM context
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* @engine - the target HW engine
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*
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* Acquire a lock on the pinned status of the HW context, such that the context
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* can neither be bound to the GPU or unbound whilst the lock is held, i.e.
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* intel_context_is_pinned() remains stable.
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*/
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struct intel_context *
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intel_context_pin_lock(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine);
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static inline bool
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intel_context_is_pinned(struct intel_context *ce)
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{
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return atomic_read(&ce->pin_count);
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}
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static inline void intel_context_pin_unlock(struct intel_context *ce)
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__releases(ce->pin_mutex)
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{
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mutex_unlock(&ce->pin_mutex);
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}
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struct intel_context *
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__intel_context_insert(struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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struct intel_context *ce);
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void
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__intel_context_remove(struct intel_context *ce);
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struct intel_context *
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intel_context_pin(struct i915_gem_context *ctx, struct intel_engine_cs *engine);
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static inline void __intel_context_pin(struct intel_context *ce)
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{
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GEM_BUG_ON(!intel_context_is_pinned(ce));
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atomic_inc(&ce->pin_count);
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}
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void intel_context_unpin(struct intel_context *ce);
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#endif /* __INTEL_CONTEXT_H__ */
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