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c3eea1942a
Add L2 Cache and On-Chip RAM EDAC support for the Altera SoCs. The SDRAM controller is using the Memory Controller model. Each type of ECC is individually configurable. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: ijc+devicetree@hellion.org.uk Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-doc@vger.kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: pawel.moll@arm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1455132384-17108-1-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
72 lines
2.4 KiB
Makefile
72 lines
2.4 KiB
Makefile
#
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# Makefile for the Linux kernel EDAC drivers.
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#
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# Copyright 02 Jul 2003, Linux Networx (http://lnxi.com)
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# This file may be distributed under the terms of the
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# GNU General Public License.
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#
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obj-$(CONFIG_EDAC) := edac_stub.o
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obj-$(CONFIG_EDAC_MM_EDAC) += edac_core.o
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edac_core-y := edac_mc.o edac_device.o edac_mc_sysfs.o
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edac_core-y += edac_module.o edac_device_sysfs.o wq.o
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edac_core-$(CONFIG_EDAC_DEBUG) += debugfs.o
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ifdef CONFIG_PCI
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edac_core-y += edac_pci.o edac_pci_sysfs.o
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endif
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obj-$(CONFIG_EDAC_GHES) += ghes_edac.o
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edac_mce_amd-y := mce_amd.o
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obj-$(CONFIG_EDAC_DECODE_MCE) += edac_mce_amd.o
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obj-$(CONFIG_EDAC_AMD76X) += amd76x_edac.o
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obj-$(CONFIG_EDAC_CPC925) += cpc925_edac.o
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obj-$(CONFIG_EDAC_I5000) += i5000_edac.o
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obj-$(CONFIG_EDAC_I5100) += i5100_edac.o
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obj-$(CONFIG_EDAC_I5400) += i5400_edac.o
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obj-$(CONFIG_EDAC_I7300) += i7300_edac.o
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obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o
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obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o
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obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
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obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
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obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o
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obj-$(CONFIG_EDAC_I82875P) += i82875p_edac.o
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obj-$(CONFIG_EDAC_I82975X) += i82975x_edac.o
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obj-$(CONFIG_EDAC_I3000) += i3000_edac.o
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obj-$(CONFIG_EDAC_I3200) += i3200_edac.o
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obj-$(CONFIG_EDAC_IE31200) += ie31200_edac.o
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obj-$(CONFIG_EDAC_X38) += x38_edac.o
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obj-$(CONFIG_EDAC_I82860) += i82860_edac.o
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obj-$(CONFIG_EDAC_R82600) += r82600_edac.o
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amd64_edac_mod-y := amd64_edac.o
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amd64_edac_mod-$(CONFIG_EDAC_DEBUG) += amd64_edac_dbg.o
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amd64_edac_mod-$(CONFIG_EDAC_AMD64_ERROR_INJECTION) += amd64_edac_inj.o
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obj-$(CONFIG_EDAC_AMD64) += amd64_edac_mod.o
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obj-$(CONFIG_EDAC_PASEMI) += pasemi_edac.o
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obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac.o
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obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o
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obj-$(CONFIG_EDAC_CELL) += cell_edac.o
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obj-$(CONFIG_EDAC_PPC4XX) += ppc4xx_edac.o
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obj-$(CONFIG_EDAC_AMD8111) += amd8111_edac.o
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obj-$(CONFIG_EDAC_AMD8131) += amd8131_edac.o
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obj-$(CONFIG_EDAC_TILE) += tile_edac.o
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obj-$(CONFIG_EDAC_HIGHBANK_MC) += highbank_mc_edac.o
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obj-$(CONFIG_EDAC_HIGHBANK_L2) += highbank_l2_edac.o
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obj-$(CONFIG_EDAC_OCTEON_PC) += octeon_edac-pc.o
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obj-$(CONFIG_EDAC_OCTEON_L2C) += octeon_edac-l2c.o
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obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o
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obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o
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obj-$(CONFIG_EDAC_ALTERA) += altera_edac.o
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obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o
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obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o
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