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HiSilicon accelerators in Hip08 use same hardware scatterlist for data format. We support it in this module. Specific accelerator drivers can use hisi_acc_create_sgl_pool to allocate hardware SGLs ahead. Then use hisi_acc_sg_buf_map_to_hw_sgl to get one hardware SGL and pass related information to hardware SGL. The DMA address of mapped hardware SGL can be passed to SGL src/dst field in QM SQE. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
24 lines
751 B
C
24 lines
751 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019 HiSilicon Limited. */
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#ifndef HISI_ACC_SGL_H
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#define HISI_ACC_SGL_H
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struct hisi_acc_sgl_pool {
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struct hisi_acc_hw_sgl *sgl;
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dma_addr_t sgl_dma;
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size_t size;
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u32 count;
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size_t sgl_size;
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};
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struct hisi_acc_hw_sgl *
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hisi_acc_sg_buf_map_to_hw_sgl(struct device *dev,
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struct scatterlist *sgl,
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struct hisi_acc_sgl_pool *pool,
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u32 index, dma_addr_t *hw_sgl_dma);
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void hisi_acc_sg_buf_unmap(struct device *dev, struct scatterlist *sgl,
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struct hisi_acc_hw_sgl *hw_sgl);
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int hisi_acc_create_sgl_pool(struct device *dev, struct hisi_acc_sgl_pool *pool,
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u32 count);
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void hisi_acc_free_sgl_pool(struct device *dev, struct hisi_acc_sgl_pool *pool);
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#endif
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