Marc Zyngier 2b0cda8789 KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers ... Those three registers are v2 emulation specific, so their implementation lives entirely in vgic-mmio-v2.c. Also they are handled in one function, as their implementation is pretty simple. When the guest enables the distributor, we kick all VCPUs to get potentially pending interrupts serviced. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>		2016-05-20 15:39:50 +02:00
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arm-gic-common.h	irqchip/gic-v3: Parse and export virtual GIC information	2016-05-03 12:54:21 +02:00
arm-gic-v3.h	KVM: arm/arm64: vgic-new: Add GICv3 world switch backend	2016-05-20 15:39:48 +02:00
arm-gic.h	KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers	2016-05-20 15:39:50 +02:00
arm-vic.h	irqchip: support cascaded VICs	2014-02-13 11:21:21 +01:00
chained_irq.h
ingenic.h	MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchip	2015-06-21 21:53:10 +02:00
irq-omap-intc.h	irqchip: omap-intc: Remove unused legacy interface for omap2	2015-01-26 11:38:23 +01:00
irq-sa11x0.h	ARM: 8367/1: sa1100: prepare for moving irq driver to drivers/irqchip	2015-05-28 14:40:03 +01:00
metag-ext.h
metag.h
mips-gic.h	MIPS: Make smp CMP, CPS and MT use the new generic IPI functions	2016-02-25 10:56:58 +01:00
mmp.h
mxs.h
versatile-fpga.h
xtensa-mx.h
xtensa-pic.h