Ville Syrjälä 2b85886a54 drm/i915: Avoid div-by-zero when pixel_multiplier is zero ... On certain platforms pixel_multiplier is read out in .get_pipe_config(), but it also gets used to calculate the pixel clock in intel_sdvo_get_config(). If the pipe is disable but some SDVO outputs are active, we may end up dividing by zero in intel_sdvo_get_config(). To avoid the problem simply check for zero pixel_multiplier and skip the division. Another attempt at fixing this involved populating pixel_multiplier to 1 even for disabled pipes, but that triggered a WARN because SDVO_CMD_GET_CLOCK_RATE_MULT command failed and thus encoder_pixel_multiplier was left at zero and didn't match pipe_config->pixel_multiplier. The "divide by pixel_multiplier" operation got introduced here: commit 18442d0878 Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Fri Sep 13 16:00:08 2013 +0300 drm/i915: Fix port_clock and adjusted_mode.clock readout all over and it has caused a regression on certain machines since they would hit the div-by-zero during resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76520 Cc: <stable@vger.kernel.org> # 3.13+ Tested-by: Tim Richardson <tim@tim-richardson.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2014-06-11 11:06:43 +03:00
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drm	drm/i915: Avoid div-by-zero when pixel_multiplier is zero	2014-06-11 11:06:43 +03:00
host1x	gpu: host1x: Rename internal functions for clarity	2014-06-05 23:10:30 +02:00
ipu-v3	gpu: ipu-v3: Register the CSI modules	2014-06-04 11:07:12 +02:00
vga	vgaswitcheroo: switch the mux to the igp on power down when runpm is enabled	2014-06-02 10:25:08 -04:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00