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baa3477f06
The mt7621 has two network interfaces, one that connects to an internal switch, and one that can connect to either that switch or an external phy, or possibly an internal phy. The Gnubee-PC2 has an external phy for use with the second interface. This patch add some support for the second interface to mt7621.dtsi and add a gbpc2.dts which makes use of this. This allows the second interface to be used. I don't fully understand how to configure this interface - the documentation is thin - so there could well be room for improvement here. Signed-off-by: NeilBrown <neil@brown.name> Link: https://lore.kernel.org/r/156194178766.1430.12784163026696670896.stgit@noble.brown Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
140 lines
2 KiB
Text
140 lines
2 KiB
Text
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc";
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model = "GB-PC1";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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palmbus: palmbus@1E000000 {
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i2c@900 {
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status = "okay";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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system {
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label = "gb-pc1:green:system";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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};
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status {
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label = "gb-pc1:green:status";
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gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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};
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lan1 {
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label = "gb-pc1:green:lan1";
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gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
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};
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lan2 {
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label = "gb-pc1:green:lan2";
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gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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broken-flash-reset;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0x1FB0000>;
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};
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};
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};
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&sysclock {
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compatible = "fixed-clock";
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/* This is normally 1/4 of cpuclock */
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clock-frequency = <225000000>;
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};
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&cpuclock {
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compatible = "fixed-clock";
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clock-frequency = <900000000>;
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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};
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&pinctrl {
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state_default: pinctrl0 {
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default_gpio: gpio {
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groups = "wdt", "rgmii2", "uart3";
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function = "gpio";
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};
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};
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};
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&switch0 {
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ports {
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port@0 {
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label = "ethblack";
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status = "ok";
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};
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port@4 {
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label = "ethblue";
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status = "ok";
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};
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};
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};
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