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2c799cef4d
This is needed to minimize io.h so the SoC specific io.h for ARMs can removed. Note that minimal driver changes for DSS and RNG are needed to include cpu.h for SoC detection macros. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Tony Lindgren <tony@atomide.com>
256 lines
7.2 KiB
C
256 lines
7.2 KiB
C
/*
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* Header for code common to all OMAP2+ machines.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
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#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
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#ifndef __ASSEMBLER__
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#include <linux/delay.h>
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#include <plat/common.h>
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#include <asm/proc-fns.h>
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#ifdef CONFIG_SOC_OMAP2420
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extern void omap242x_map_common_io(void);
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#else
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static inline void omap242x_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_SOC_OMAP2430
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extern void omap243x_map_common_io(void);
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#else
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static inline void omap243x_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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extern void omap34xx_map_common_io(void);
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#else
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static inline void omap34xx_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_SOC_OMAPTI81XX
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extern void omapti81xx_map_common_io(void);
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#else
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static inline void omapti81xx_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_SOC_OMAPAM33XX
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extern void omapam33xx_map_common_io(void);
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#else
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static inline void omapam33xx_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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extern void omap44xx_map_common_io(void);
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#else
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static inline void omap44xx_map_common_io(void)
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{
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}
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#endif
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extern void omap2_init_common_infrastructure(void);
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extern struct sys_timer omap2_timer;
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extern struct sys_timer omap3_timer;
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extern struct sys_timer omap3_secure_timer;
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extern struct sys_timer omap4_timer;
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void omap2420_init_early(void);
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void omap2430_init_early(void);
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void omap3430_init_early(void);
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void omap35xx_init_early(void);
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void omap3630_init_early(void);
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void omap3_init_early(void); /* Do not use this one */
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void am35xx_init_early(void);
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void ti81xx_init_early(void);
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void omap4430_init_early(void);
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void omap_prcm_restart(char, const char *);
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/*
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* IO bases for various OMAP processors
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* Except the tap base, rest all the io bases
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* listed are physical addresses.
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*/
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struct omap_globals {
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u32 class; /* OMAP class to detect */
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void __iomem *tap; /* Control module ID code */
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void __iomem *sdrc; /* SDRAM Controller */
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void __iomem *sms; /* SDRAM Memory Scheduler */
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void __iomem *ctrl; /* System Control Module */
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void __iomem *ctrl_pad; /* PAD Control Module */
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void __iomem *prm; /* Power and Reset Management */
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void __iomem *cm; /* Clock Management */
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void __iomem *cm2;
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};
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void omap2_set_globals_242x(void);
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void omap2_set_globals_243x(void);
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void omap2_set_globals_3xxx(void);
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void omap2_set_globals_443x(void);
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void omap2_set_globals_ti81xx(void);
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void omap2_set_globals_am33xx(void);
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/* These get called from omap2_set_globals_xxxx(), do not call these */
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void omap2_set_globals_tap(struct omap_globals *);
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void omap2_set_globals_sdrc(struct omap_globals *);
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void omap2_set_globals_control(struct omap_globals *);
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void omap2_set_globals_prcm(struct omap_globals *);
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void omap242x_map_io(void);
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void omap243x_map_io(void);
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void omap3_map_io(void);
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void am33xx_map_io(void);
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void omap4_map_io(void);
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void ti81xx_map_io(void);
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extern void __init omap_init_consistent_dma_size(void);
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/**
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* omap_test_timeout - busy-loop, testing a condition
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* @cond: condition to test until it evaluates to true
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* @timeout: maximum number of microseconds in the timeout
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* @index: loop index (integer)
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*
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* Loop waiting for @cond to become true or until at least @timeout
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* microseconds have passed. To use, define some integer @index in the
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* calling code. After running, if @index == @timeout, then the loop has
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* timed out.
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*/
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#define omap_test_timeout(cond, timeout, index) \
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({ \
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for (index = 0; index < timeout; index++) { \
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if (cond) \
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break; \
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udelay(1); \
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} \
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})
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extern struct device *omap2_get_mpuss_device(void);
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extern struct device *omap2_get_iva_device(void);
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extern struct device *omap2_get_l3_device(void);
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extern struct device *omap4_get_dsp_device(void);
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void omap2_init_irq(void);
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void omap3_init_irq(void);
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void ti81xx_init_irq(void);
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extern int omap_irq_pending(void);
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void omap_intc_save_context(void);
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void omap_intc_restore_context(void);
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void omap3_intc_suspend(void);
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void omap3_intc_prepare_idle(void);
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void omap3_intc_resume_idle(void);
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void omap2_intc_handle_irq(struct pt_regs *regs);
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void omap3_intc_handle_irq(struct pt_regs *regs);
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#ifdef CONFIG_CACHE_L2X0
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extern void __iomem *omap4_get_l2cache_base(void);
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#endif
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#ifdef CONFIG_SMP
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extern void __iomem *omap4_get_scu_base(void);
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#else
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static inline void __iomem *omap4_get_scu_base(void)
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{
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return NULL;
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}
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#endif
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extern void __init gic_init_irq(void);
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extern void omap_smc1(u32 fn, u32 arg);
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extern void __iomem *omap4_get_sar_ram_base(void);
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extern void omap_do_wfi(void);
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#ifdef CONFIG_SMP
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/* Needed for secondary core boot */
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extern void omap_secondary_startup(void);
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extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
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extern void omap_auxcoreboot_addr(u32 cpu_addr);
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extern u32 omap_read_auxcoreboot0(void);
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#endif
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#if defined(CONFIG_SMP) && defined(CONFIG_PM)
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extern int omap4_mpuss_init(void);
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extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
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extern int omap4_finish_suspend(unsigned long cpu_state);
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extern void omap4_cpu_resume(void);
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extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
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extern u32 omap4_mpuss_read_prev_context_state(void);
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#else
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static inline int omap4_enter_lowpower(unsigned int cpu,
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unsigned int power_state)
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{
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cpu_do_idle();
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return 0;
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}
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static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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{
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cpu_do_idle();
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return 0;
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}
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static inline int omap4_mpuss_init(void)
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{
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return 0;
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}
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static inline int omap4_finish_suspend(unsigned long cpu_state)
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{
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return 0;
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}
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static inline void omap4_cpu_resume(void)
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{}
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static inline u32 omap4_mpuss_read_prev_context_state(void)
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{
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return 0;
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}
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#endif
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struct omap_sdrc_params;
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extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
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struct omap_sdrc_params *sdrc_cs1);
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/*
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* NOTE: Please use ioremap + __raw_read/write where possible instead of these
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*/
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extern u8 omap_readb(u32 pa);
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extern u16 omap_readw(u32 pa);
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extern u32 omap_readl(u32 pa);
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extern void omap_writeb(u8 v, u32 pa);
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extern void omap_writew(u16 v, u32 pa);
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extern void omap_writel(u32 v, u32 pa);
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#endif /* __ASSEMBLER__ */
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#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
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