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![Jan Kiszka](/assets/img/avatar_default.png)
The SIMATIC IOT2020 and IOT2040 are derived from the Galileo Gen2 board and share its I2C frequency. Signed-off-by: Sascha Weisenberger <sascha.weisenberger@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
304 lines
7.6 KiB
C
304 lines
7.6 KiB
C
/*
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* Intel Quark MFD PCI driver for I2C & GPIO
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* Intel Quark PCI device for I2C and GPIO controller sharing the same
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* PCI function. This PCI driver will split the 2 devices into their
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* respective drivers.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/mfd/core.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/dmi.h>
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#include <linux/platform_data/gpio-dwapb.h>
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#include <linux/platform_data/i2c-designware.h>
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/* PCI BAR for register base address */
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#define MFD_I2C_BAR 0
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#define MFD_GPIO_BAR 1
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/* ACPI _ADR value to match the child node */
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#define MFD_ACPI_MATCH_GPIO 0ULL
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#define MFD_ACPI_MATCH_I2C 1ULL
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/* The base GPIO number under GPIOLIB framework */
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#define INTEL_QUARK_MFD_GPIO_BASE 8
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/* The default number of South-Cluster GPIO on Quark. */
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#define INTEL_QUARK_MFD_NGPIO 8
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/* The DesignWare GPIO ports on Quark. */
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#define INTEL_QUARK_GPIO_NPORTS 1
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#define INTEL_QUARK_IORES_MEM 0
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#define INTEL_QUARK_IORES_IRQ 1
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#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
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/* The Quark I2C controller source clock */
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#define INTEL_QUARK_I2C_CLK_HZ 33000000
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struct intel_quark_mfd {
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struct device *dev;
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struct clk *i2c_clk;
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struct clk_lookup *i2c_clk_lookup;
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};
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static const struct dmi_system_id dmi_platform_info[] = {
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{
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.matches = {
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
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},
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.driver_data = (void *)100000,
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},
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{
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.matches = {
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
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},
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.driver_data = (void *)400000,
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},
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{
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.matches = {
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
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DMI_EXACT_MATCH(DMI_BOARD_ASSET_TAG,
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"6ES7647-0AA00-0YA2"),
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},
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.driver_data = (void *)400000,
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},
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{
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.matches = {
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DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
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DMI_EXACT_MATCH(DMI_BOARD_ASSET_TAG,
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"6ES7647-0AA00-1YA2"),
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},
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.driver_data = (void *)400000,
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},
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{}
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};
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static struct resource intel_quark_i2c_res[] = {
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[INTEL_QUARK_IORES_MEM] = {
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.flags = IORESOURCE_MEM,
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},
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[INTEL_QUARK_IORES_IRQ] = {
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
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.adr = MFD_ACPI_MATCH_I2C,
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};
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static struct resource intel_quark_gpio_res[] = {
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[INTEL_QUARK_IORES_MEM] = {
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.flags = IORESOURCE_MEM,
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},
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};
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static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
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.adr = MFD_ACPI_MATCH_GPIO,
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};
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static struct mfd_cell intel_quark_mfd_cells[] = {
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{
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.id = MFD_GPIO_BAR,
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.name = "gpio-dwapb",
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.acpi_match = &intel_quark_acpi_match_gpio,
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.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
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.resources = intel_quark_gpio_res,
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.ignore_resource_conflicts = true,
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},
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{
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.id = MFD_I2C_BAR,
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.name = "i2c_designware",
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.acpi_match = &intel_quark_acpi_match_i2c,
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.num_resources = ARRAY_SIZE(intel_quark_i2c_res),
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.resources = intel_quark_i2c_res,
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.ignore_resource_conflicts = true,
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},
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};
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static const struct pci_device_id intel_quark_mfd_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x0934), },
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{},
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};
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MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
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static int intel_quark_register_i2c_clk(struct device *dev)
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{
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struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
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struct clk *i2c_clk;
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i2c_clk = clk_register_fixed_rate(dev,
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INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
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0, INTEL_QUARK_I2C_CLK_HZ);
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if (IS_ERR(i2c_clk))
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return PTR_ERR(i2c_clk);
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quark_mfd->i2c_clk = i2c_clk;
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quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
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INTEL_QUARK_I2C_CONTROLLER_CLK);
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if (!quark_mfd->i2c_clk_lookup) {
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clk_unregister(quark_mfd->i2c_clk);
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dev_err(dev, "Fixed clk register failed\n");
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return -ENOMEM;
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}
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return 0;
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}
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static void intel_quark_unregister_i2c_clk(struct device *dev)
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{
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struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
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if (!quark_mfd->i2c_clk_lookup)
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return;
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clkdev_drop(quark_mfd->i2c_clk_lookup);
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clk_unregister(quark_mfd->i2c_clk);
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}
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static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
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{
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const struct dmi_system_id *dmi_id;
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struct dw_i2c_platform_data *pdata;
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struct resource *res = (struct resource *)cell->resources;
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struct device *dev = &pdev->dev;
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res[INTEL_QUARK_IORES_MEM].start =
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pci_resource_start(pdev, MFD_I2C_BAR);
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res[INTEL_QUARK_IORES_MEM].end =
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pci_resource_end(pdev, MFD_I2C_BAR);
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res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
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res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
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pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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/* Normal mode by default */
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pdata->i2c_scl_freq = 100000;
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dmi_id = dmi_first_match(dmi_platform_info);
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if (dmi_id)
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pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data;
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cell->platform_data = pdata;
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cell->pdata_size = sizeof(*pdata);
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return 0;
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}
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static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
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{
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struct dwapb_platform_data *pdata;
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struct resource *res = (struct resource *)cell->resources;
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struct device *dev = &pdev->dev;
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res[INTEL_QUARK_IORES_MEM].start =
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pci_resource_start(pdev, MFD_GPIO_BAR);
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res[INTEL_QUARK_IORES_MEM].end =
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pci_resource_end(pdev, MFD_GPIO_BAR);
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pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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/* For intel quark x1000, it has only one port: portA */
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pdata->nports = INTEL_QUARK_GPIO_NPORTS;
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pdata->properties = devm_kcalloc(dev, pdata->nports,
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sizeof(*pdata->properties),
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GFP_KERNEL);
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if (!pdata->properties)
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return -ENOMEM;
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/* Set the properties for portA */
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pdata->properties->fwnode = NULL;
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pdata->properties->idx = 0;
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pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
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pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
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pdata->properties->irq = pdev->irq;
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pdata->properties->irq_shared = true;
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cell->platform_data = pdata;
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cell->pdata_size = sizeof(*pdata);
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return 0;
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}
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static int intel_quark_mfd_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct intel_quark_mfd *quark_mfd;
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int ret;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
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if (!quark_mfd)
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return -ENOMEM;
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quark_mfd->dev = &pdev->dev;
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dev_set_drvdata(&pdev->dev, quark_mfd);
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ret = intel_quark_register_i2c_clk(&pdev->dev);
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if (ret)
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return ret;
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ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
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if (ret)
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goto err_unregister_i2c_clk;
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ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
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if (ret)
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goto err_unregister_i2c_clk;
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ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
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ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
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NULL);
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if (ret)
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goto err_unregister_i2c_clk;
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return 0;
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err_unregister_i2c_clk:
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intel_quark_unregister_i2c_clk(&pdev->dev);
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return ret;
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}
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static void intel_quark_mfd_remove(struct pci_dev *pdev)
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{
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intel_quark_unregister_i2c_clk(&pdev->dev);
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mfd_remove_devices(&pdev->dev);
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}
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static struct pci_driver intel_quark_mfd_driver = {
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.name = "intel_quark_mfd_i2c_gpio",
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.id_table = intel_quark_mfd_ids,
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.probe = intel_quark_mfd_probe,
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.remove = intel_quark_mfd_remove,
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};
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module_pci_driver(intel_quark_mfd_driver);
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MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
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MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
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MODULE_LICENSE("GPL v2");
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