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![Icenowy Zheng](/assets/img/avatar_default.png)
The H3 SoC have a bigger SID controller, which has its direct read address at 0x200 position in the SID block, not 0x0. Also, H3 SID controller has some silicon bug that makes the direct read value wrong at cold boot, add code to workaround the bug. (This bug has already been fixed on A64 and later SoCs) Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
222 lines
5.6 KiB
C
222 lines
5.6 KiB
C
/*
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* Allwinner sunXi SoCs Security ID support.
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*
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* Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
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* Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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/* Registers and special values for doing register-based SID readout on H3 */
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#define SUN8I_SID_PRCTL 0x40
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#define SUN8I_SID_RDKEY 0x60
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#define SUN8I_SID_OFFSET_MASK 0x1FF
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#define SUN8I_SID_OFFSET_SHIFT 16
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#define SUN8I_SID_OP_LOCK (0xAC << 8)
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#define SUN8I_SID_READ BIT(1)
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static struct nvmem_config econfig = {
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.name = "sunxi-sid",
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.read_only = true,
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.stride = 4,
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.word_size = 1,
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.owner = THIS_MODULE,
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};
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struct sunxi_sid_cfg {
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u32 value_offset;
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u32 size;
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bool need_register_readout;
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};
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struct sunxi_sid {
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void __iomem *base;
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u32 value_offset;
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};
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/* We read the entire key, due to a 32 bit read alignment requirement. Since we
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* want to return the requested byte, this results in somewhat slower code and
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* uses 4 times more reads as needed but keeps code simpler. Since the SID is
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* only very rarely probed, this is not really an issue.
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*/
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static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid,
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const unsigned int offset)
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{
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u32 sid_key;
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sid_key = ioread32be(sid->base + round_down(offset, 4));
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sid_key >>= (offset % 4) * 8;
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return sid_key; /* Only return the last byte */
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}
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static int sunxi_sid_read(void *context, unsigned int offset,
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void *val, size_t bytes)
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{
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struct sunxi_sid *sid = context;
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u8 *buf = val;
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/* Offset the read operation to the real position of SID */
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offset += sid->value_offset;
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while (bytes--)
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*buf++ = sunxi_sid_read_byte(sid, offset++);
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return 0;
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}
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static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
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const unsigned int word)
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{
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u32 reg_val;
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int ret;
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/* Set word, lock access, and set read command */
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reg_val = (word & SUN8I_SID_OFFSET_MASK)
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<< SUN8I_SID_OFFSET_SHIFT;
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reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
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writel(reg_val, sid->base + SUN8I_SID_PRCTL);
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ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
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!(reg_val & SUN8I_SID_READ), 100, 250000);
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if (ret)
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return ret;
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writel(0, sid->base + SUN8I_SID_PRCTL);
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return 0;
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}
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static int sunxi_sid_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct nvmem_device *nvmem;
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struct sunxi_sid *sid;
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int ret, i, size;
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char *randomness;
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const struct sunxi_sid_cfg *cfg;
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sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
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if (!sid)
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return -ENOMEM;
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cfg = of_device_get_match_data(dev);
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if (!cfg)
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return -EINVAL;
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sid->value_offset = cfg->value_offset;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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sid->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(sid->base))
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return PTR_ERR(sid->base);
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size = cfg->size;
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if (cfg->need_register_readout) {
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/*
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* H3's SID controller have a bug that the value at 0x200
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* offset is not the correct value when the hardware is reseted.
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* However, after doing a register-based read operation, the
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* value become right.
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* Do a full read operation here, but ignore its value
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* (as it's more fast to read by direct MMIO value than
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* with registers)
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*/
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for (i = 0; i < (size >> 2); i++) {
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ret = sun8i_sid_register_readout(sid, i);
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if (ret)
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return ret;
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}
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}
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econfig.size = size;
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econfig.dev = dev;
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econfig.reg_read = sunxi_sid_read;
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econfig.priv = sid;
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nvmem = nvmem_register(&econfig);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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randomness = kzalloc(sizeof(u8) * (size), GFP_KERNEL);
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if (!randomness) {
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ret = -EINVAL;
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goto err_unreg_nvmem;
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}
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for (i = 0; i < size; i++)
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randomness[i] = sunxi_sid_read_byte(sid, i);
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add_device_randomness(randomness, size);
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kfree(randomness);
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platform_set_drvdata(pdev, nvmem);
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return 0;
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err_unreg_nvmem:
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nvmem_unregister(nvmem);
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return ret;
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}
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static int sunxi_sid_remove(struct platform_device *pdev)
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{
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struct nvmem_device *nvmem = platform_get_drvdata(pdev);
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return nvmem_unregister(nvmem);
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}
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static const struct sunxi_sid_cfg sun4i_a10_cfg = {
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.size = 0x10,
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};
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static const struct sunxi_sid_cfg sun7i_a20_cfg = {
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.size = 0x200,
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};
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static const struct sunxi_sid_cfg sun8i_h3_cfg = {
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.value_offset = 0x200,
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.size = 0x100,
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.need_register_readout = true,
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};
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static const struct of_device_id sunxi_sid_of_match[] = {
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{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
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{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
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{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
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{/* sentinel */},
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};
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MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
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static struct platform_driver sunxi_sid_driver = {
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.probe = sunxi_sid_probe,
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.remove = sunxi_sid_remove,
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.driver = {
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.name = "eeprom-sunxi-sid",
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.of_match_table = sunxi_sid_of_match,
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},
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};
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module_platform_driver(sunxi_sid_driver);
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MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
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MODULE_DESCRIPTION("Allwinner sunxi security id driver");
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MODULE_LICENSE("GPL");
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