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![Dave Airlie](/assets/img/avatar_default.png)
UAPI Changes: Cross-subsystem Changes: * dma-buf: Add sync-file API; Set DMA mask for udmabuf devices * fbcon: Cleanups * fbdev: Disable firmware-device registration when first native driver loads * iosys-map: Documentation fixes Core Changes: * edid: Use struct drm_edid in more places * gem-cma-helper: Improve documentation * of: Add data-lane helpers and convert drivers * syncobj: Fixes Driver Changes: * amdgpu: Build fixes * ast: Support multiple outputs * bochs: Include <linux/module.h> * bridge: adv7511: I2C fixes; anx7625: Fix error handling; lt6505: Kconfig fixes * display/dp: Documentation fixes * display/dp-mst: Read extended DPCD capabilities during system resume * logicvc: Add new driver * magag200: Build fixes * nouveau: Cleanups * panel: Add backlight support; nt36672a: DT backlight support * qxl: Cleanups * sun4i: HDMI PHY cleanups * vc4: Add support for BCM2711 * virt-gpu: Avoid NULL dereference; Fix error checks; Cleanups * vkms: Allocate output buffer with vmalloc(); Fixes -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEchf7rIzpz2NEoWjlaA3BHVMLeiMFAmKsKwAACgkQaA3BHVML eiPnJAgArdU7DOVUuRm0clRBHNndob37pICGbvdh84jNEpHq6rdfpi7HGqvNYvSy KyVhBPKFxygDyXNrgFh5YnMLX8Gr+S73VRKXc19k5tc3KYG9W36Vg/aBL7fXqs1F VDGgC0uksMIA2X0J03a+cZuQV8drYoWLUO7Pz0TcqFE+9cSSBe8gJb6lSt9rPIYx 0YTFWsHbL9VeW/VuhyG11KLL3s2SGofP4lw8i7H01RQJRGYo/Ak95ysA9Uo/4AXA nwOoK46MqPtsqs+dxGU/Ix6jP8KHSGMPKb+WEfv8WDQvdhOnOyUsza3V2Uma2H+M 2wlAkJnhyUXletzTRQBUnGFBHcccpA== =8nrd -----END PGP SIGNATURE----- Merge tag 'drm-misc-next-2022-06-17' of git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.20: UAPI Changes: Cross-subsystem Changes: * dma-buf: Add sync-file API; Set DMA mask for udmabuf devices * fbcon: Cleanups * fbdev: Disable firmware-device registration when first native driver loads * iosys-map: Documentation fixes Core Changes: * edid: Use struct drm_edid in more places * gem-cma-helper: Improve documentation * of: Add data-lane helpers and convert drivers * syncobj: Fixes Driver Changes: * amdgpu: Build fixes * ast: Support multiple outputs * bochs: Include <linux/module.h> * bridge: adv7511: I2C fixes; anx7625: Fix error handling; lt6505: Kconfig fixes * display/dp: Documentation fixes * display/dp-mst: Read extended DPCD capabilities during system resume * logicvc: Add new driver * magag200: Build fixes * nouveau: Cleanups * panel: Add backlight support; nt36672a: DT backlight support * qxl: Cleanups * sun4i: HDMI PHY cleanups * vc4: Add support for BCM2711 * virt-gpu: Avoid NULL dereference; Fix error checks; Cleanups * vkms: Allocate output buffer with vmalloc(); Fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/YqwriEhn0l4uO+Gn@linux-uq9g
182 lines
7.2 KiB
C
182 lines
7.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Framework for buffer objects that can be shared across devices/subsystems.
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*
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* Copyright(C) 2015 Intel Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _DMA_BUF_UAPI_H_
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#define _DMA_BUF_UAPI_H_
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#include <linux/types.h>
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/**
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* struct dma_buf_sync - Synchronize with CPU access.
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*
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* When a DMA buffer is accessed from the CPU via mmap, it is not always
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* possible to guarantee coherency between the CPU-visible map and underlying
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* memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
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* any CPU access to give the kernel the chance to shuffle memory around if
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* needed.
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*
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* Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
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* with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
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* access is complete, the client should call DMA_BUF_IOCTL_SYNC with
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* DMA_BUF_SYNC_END and the same read/write flags.
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*
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* The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
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* coherency. It does not prevent other processes or devices from
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* accessing the memory at the same time. If synchronization with a GPU or
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* other device driver is required, it is the client's responsibility to
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* wait for buffer to be ready for reading or writing before calling this
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* ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
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* follow-up work is not submitted to GPU or other device driver until
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* after this ioctl has been called with DMA_BUF_SYNC_END?
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*
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* If the driver or API with which the client is interacting uses implicit
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* synchronization, waiting for prior work to complete can be done via
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* poll() on the DMA buffer file descriptor. If the driver or API requires
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* explicit synchronization, the client may have to wait on a sync_file or
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* other synchronization primitive outside the scope of the DMA buffer API.
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*/
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struct dma_buf_sync {
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/**
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* @flags: Set of access flags
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*
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* DMA_BUF_SYNC_START:
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* Indicates the start of a map access session.
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*
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* DMA_BUF_SYNC_END:
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* Indicates the end of a map access session.
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*
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* DMA_BUF_SYNC_READ:
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* Indicates that the mapped DMA buffer will be read by the
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* client via the CPU map.
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*
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* DMA_BUF_SYNC_WRITE:
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* Indicates that the mapped DMA buffer will be written by the
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* client via the CPU map.
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*
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* DMA_BUF_SYNC_RW:
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* An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
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*/
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__u64 flags;
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};
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#define DMA_BUF_SYNC_READ (1 << 0)
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#define DMA_BUF_SYNC_WRITE (2 << 0)
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#define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
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#define DMA_BUF_SYNC_START (0 << 2)
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#define DMA_BUF_SYNC_END (1 << 2)
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#define DMA_BUF_SYNC_VALID_FLAGS_MASK \
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(DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
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#define DMA_BUF_NAME_LEN 32
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/**
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* struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
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*
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* Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
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* current set of fences on a dma-buf file descriptor as a sync_file. CPU
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* waits via poll() or other driver-specific mechanisms typically wait on
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* whatever fences are on the dma-buf at the time the wait begins. This
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* is similar except that it takes a snapshot of the current fences on the
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* dma-buf for waiting later instead of waiting immediately. This is
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* useful for modern graphics APIs such as Vulkan which assume an explicit
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* synchronization model but still need to inter-operate with dma-buf.
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*
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* The intended usage pattern is the following:
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*
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* 1. Export a sync_file with flags corresponding to the expected GPU usage
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* via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
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*
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* 2. Submit rendering work which uses the dma-buf. The work should wait on
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* the exported sync file before rendering and produce another sync_file
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* when complete.
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*
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* 3. Import the rendering-complete sync_file into the dma-buf with flags
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* corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
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*
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* Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
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* the above is not a single atomic operation. If userspace wants to ensure
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* ordering via these fences, it is the respnosibility of userspace to use
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* locks or other mechanisms to ensure that no other context adds fences or
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* submits work between steps 1 and 3 above.
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*/
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struct dma_buf_export_sync_file {
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/**
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* @flags: Read/write flags
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*
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* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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*
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* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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* the returned sync file waits on any writers of the dma-buf to
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* complete. Waiting on the returned sync file is equivalent to
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* poll() with POLLIN.
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*
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* If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
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* any users of the dma-buf (read or write) to complete. Waiting
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* on the returned sync file is equivalent to poll() with POLLOUT.
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* If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
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* is equivalent to just DMA_BUF_SYNC_WRITE.
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*/
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__u32 flags;
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/** @fd: Returned sync file descriptor */
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__s32 fd;
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};
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/**
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* struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
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*
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* Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
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* sync_file into a dma-buf for the purposes of implicit synchronization
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* with other dma-buf consumers. This allows clients using explicitly
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* synchronized APIs such as Vulkan to inter-op with dma-buf consumers
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* which expect implicit synchronization such as OpenGL or most media
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* drivers/video.
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*/
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struct dma_buf_import_sync_file {
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/**
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* @flags: Read/write flags
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*
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* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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*
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* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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* this inserts the sync_file as a read-only fence. Any subsequent
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* implicitly synchronized writes to this dma-buf will wait on this
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* fence but reads will not.
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*
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* If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
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* write fence. All subsequent implicitly synchronized access to
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* this dma-buf will wait on this fence.
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*/
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__u32 flags;
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/** @fd: Sync file descriptor */
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__s32 fd;
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};
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#define DMA_BUF_BASE 'b'
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#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
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/* 32/64bitness of this uapi was botched in android, there's no difference
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* between them in actual uapi, they're just different numbers.
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*/
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#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
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#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32)
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#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
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#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
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#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
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#endif
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