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2db4928bb5
To support "hybrid" DMA ops in a subsequent patch, we will need both a direct DMA offset and an iommu pointer. Those are currently exclusive (a union), so change them to be separate fields. While there, also type iommu_table_base properly and make exist only on CONFIG_PPC64 since it's not referenced on 32-bit at all. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
63 lines
1.2 KiB
C
63 lines
1.2 KiB
C
/*
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* Arch specific extensions to struct device
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*
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* This file is released under the GPLv2
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*/
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#ifndef _ASM_POWERPC_DEVICE_H
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#define _ASM_POWERPC_DEVICE_H
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struct dma_map_ops;
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struct device_node;
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#ifdef CONFIG_PPC64
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struct pci_dn;
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struct iommu_table;
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#endif
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/*
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* Arch extensions to struct device.
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*
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* When adding fields, consider macio_add_one_device in
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* drivers/macintosh/macio_asic.c
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*/
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struct dev_archdata {
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/* DMA operations on that device */
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struct dma_map_ops *dma_ops;
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/*
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* These two used to be a union. However, with the hybrid ops we need
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* both so here we store both a DMA offset for direct mappings and
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* an iommu_table for remapped DMA.
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*/
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dma_addr_t dma_offset;
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#ifdef CONFIG_PPC64
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struct iommu_table *iommu_table_base;
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#endif
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#ifdef CONFIG_IOMMU_API
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void *iommu_domain;
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#endif
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#ifdef CONFIG_SWIOTLB
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dma_addr_t max_direct_dma_addr;
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#endif
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#ifdef CONFIG_PPC64
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struct pci_dn *pci_data;
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#endif
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#ifdef CONFIG_EEH
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struct eeh_dev *edev;
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#endif
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#ifdef CONFIG_FAIL_IOMMU
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int fail_iommu;
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#endif
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#ifdef CONFIG_CXL_BASE
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struct cxl_context *cxl_ctx;
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#endif
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};
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struct pdev_archdata {
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u64 dma_mask;
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};
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#define ARCH_HAS_DMA_GET_REQUIRED_MASK
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#endif /* _ASM_POWERPC_DEVICE_H */
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