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67288f74d4
Add the icc_sync_state callback to notify the framework when consumers
are probed and the bandwidth doesn't have to be kept at maximum anymore.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Suggested-by: Georgi Djakov <georgi.djakov@linaro.org>
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Link: https://lore.kernel.org/r/20201210100906.18205-6-martin.kepplinger@puri.sm
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
105 lines
3.4 KiB
C
105 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Interconnect framework driver for i.MX8MQ SoC
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*
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* Copyright (c) 2019-2020, NXP
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/interconnect-provider.h>
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#include <dt-bindings/interconnect/imx8mq.h>
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#include "imx.h"
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static const struct imx_icc_node_adj_desc imx8mq_dram_adj = {
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.bw_mul = 1,
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.bw_div = 4,
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.phandle_name = "fsl,ddrc",
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};
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static const struct imx_icc_node_adj_desc imx8mq_noc_adj = {
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.bw_mul = 1,
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.bw_div = 4,
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.main_noc = true,
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};
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/*
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* Describe bus masters, slaves and connections between them
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*
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* This is a simplified subset of the bus diagram, there are several other
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* PL301 nics which are skipped/merged into PL301_MAIN
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*/
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static struct imx_icc_node_desc nodes[] = {
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DEFINE_BUS_INTERCONNECT("NOC", IMX8MQ_ICN_NOC, &imx8mq_noc_adj,
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IMX8MQ_ICS_DRAM, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_SLAVE("DRAM", IMX8MQ_ICS_DRAM, &imx8mq_dram_adj),
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DEFINE_BUS_SLAVE("OCRAM", IMX8MQ_ICS_OCRAM, NULL),
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DEFINE_BUS_MASTER("A53", IMX8MQ_ICM_A53, IMX8MQ_ICN_NOC),
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/* VPUMIX */
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DEFINE_BUS_MASTER("VPU", IMX8MQ_ICM_VPU, IMX8MQ_ICN_VIDEO),
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DEFINE_BUS_INTERCONNECT("PL301_VIDEO", IMX8MQ_ICN_VIDEO, NULL, IMX8MQ_ICN_NOC),
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/* GPUMIX */
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DEFINE_BUS_MASTER("GPU", IMX8MQ_ICM_GPU, IMX8MQ_ICN_GPU),
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DEFINE_BUS_INTERCONNECT("PL301_GPU", IMX8MQ_ICN_GPU, NULL, IMX8MQ_ICN_NOC),
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/* DISPMIX (only for DCSS) */
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DEFINE_BUS_MASTER("DC", IMX8MQ_ICM_DCSS, IMX8MQ_ICN_DCSS),
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DEFINE_BUS_INTERCONNECT("PL301_DC", IMX8MQ_ICN_DCSS, NULL, IMX8MQ_ICN_NOC),
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/* USBMIX */
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DEFINE_BUS_MASTER("USB1", IMX8MQ_ICM_USB1, IMX8MQ_ICN_USB),
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DEFINE_BUS_MASTER("USB2", IMX8MQ_ICM_USB2, IMX8MQ_ICN_USB),
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DEFINE_BUS_INTERCONNECT("PL301_USB", IMX8MQ_ICN_USB, NULL, IMX8MQ_ICN_NOC),
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/* PL301_DISPLAY (IPs other than DCSS, inside SUPERMIX) */
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DEFINE_BUS_MASTER("CSI1", IMX8MQ_ICM_CSI1, IMX8MQ_ICN_DISPLAY),
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DEFINE_BUS_MASTER("CSI2", IMX8MQ_ICM_CSI2, IMX8MQ_ICN_DISPLAY),
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DEFINE_BUS_MASTER("LCDIF", IMX8MQ_ICM_LCDIF, IMX8MQ_ICN_DISPLAY),
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DEFINE_BUS_INTERCONNECT("PL301_DISPLAY", IMX8MQ_ICN_DISPLAY, NULL, IMX8MQ_ICN_MAIN),
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/* AUDIO */
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DEFINE_BUS_MASTER("SDMA2", IMX8MQ_ICM_SDMA2, IMX8MQ_ICN_AUDIO),
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DEFINE_BUS_INTERCONNECT("PL301_AUDIO", IMX8MQ_ICN_AUDIO, NULL, IMX8MQ_ICN_DISPLAY),
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/* ENET */
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DEFINE_BUS_MASTER("ENET", IMX8MQ_ICM_ENET, IMX8MQ_ICN_ENET),
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DEFINE_BUS_INTERCONNECT("PL301_ENET", IMX8MQ_ICN_ENET, NULL, IMX8MQ_ICN_MAIN),
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/* OTHER */
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DEFINE_BUS_MASTER("SDMA1", IMX8MQ_ICM_SDMA1, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_MASTER("NAND", IMX8MQ_ICM_NAND, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_MASTER("USDHC1", IMX8MQ_ICM_USDHC1, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_MASTER("USDHC2", IMX8MQ_ICM_USDHC2, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_MASTER("PCIE1", IMX8MQ_ICM_PCIE1, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_MASTER("PCIE2", IMX8MQ_ICM_PCIE2, IMX8MQ_ICN_MAIN),
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DEFINE_BUS_INTERCONNECT("PL301_MAIN", IMX8MQ_ICN_MAIN, NULL,
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IMX8MQ_ICN_NOC, IMX8MQ_ICS_OCRAM),
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};
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static int imx8mq_icc_probe(struct platform_device *pdev)
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{
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return imx_icc_register(pdev, nodes, ARRAY_SIZE(nodes));
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}
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static int imx8mq_icc_remove(struct platform_device *pdev)
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{
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return imx_icc_unregister(pdev);
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}
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static struct platform_driver imx8mq_icc_driver = {
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.probe = imx8mq_icc_probe,
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.remove = imx8mq_icc_remove,
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.driver = {
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.name = "imx8mq-interconnect",
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.sync_state = icc_sync_state,
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},
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};
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module_platform_driver(imx8mq_icc_driver);
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MODULE_ALIAS("platform:imx8mq-interconnect");
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MODULE_AUTHOR("Leonard Crestez <leonard.crestez@nxp.com>");
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MODULE_LICENSE("GPL v2");
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