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![Sudeep Holla](/assets/img/avatar_default.png)
Commitc45ded7e11
("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)") enabled the type3/4 of PCCT, but the change in pcc_mbox_irq breaks the other PCC subtypes. The kernel reports a warning on an Ampere eMag server -->8 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-rc4 #127 Hardware name: MiTAC RAPTOR EV-883832-X3-0001/RAPTOR, BIOS 0.14 02/22/2019 Call trace: dump_backtrace+0x0/0x200 show_stack+0x20/0x30 dump_stack_lvl+0x68/0x84 dump_stack+0x18/0x34 __report_bad_irq+0x54/0x17c note_interrupt+0x330/0x428 handle_irq_event_percpu+0x90/0x98 handle_irq_event+0x4c/0x148 handle_fasteoi_irq+0xc4/0x188 generic_handle_domain_irq+0x44/0x68 gic_handle_irq+0x84/0x2ec call_on_irq_stack+0x28/0x34 do_interrupt_handler+0x88/0x90 el1_interrupt+0x48/0xb0 el1h_64_irq_handler+0x18/0x28 el1h_64_irq+0x7c/0x80 Fixes:c45ded7e11
("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)") Reported-by: Justin He <justin.he@arm.com> Tested-by: Justin He <justin.he@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
757 lines
20 KiB
C
757 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2014 Linaro Ltd.
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* Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
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*
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* PCC (Platform Communication Channel) is defined in the ACPI 5.0+
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* specification. It is a mailbox like mechanism to allow clients
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* such as CPPC (Collaborative Processor Performance Control), RAS
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* (Reliability, Availability and Serviceability) and MPST (Memory
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* Node Power State Table) to talk to the platform (e.g. BMC) through
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* shared memory regions as defined in the PCC table entries. The PCC
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* specification supports a Doorbell mechanism for the PCC clients
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* to notify the platform about new data. This Doorbell information
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* is also specified in each PCC table entry.
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*
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* Typical high level flow of operation is:
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*
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* PCC Reads:
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* * Client tries to acquire a channel lock.
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* * After it is acquired it writes READ cmd in communication region cmd
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* address.
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* * Client issues mbox_send_message() which rings the PCC doorbell
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* for its PCC channel.
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* * If command completes, then client has control over channel and
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* it can proceed with its reads.
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* * Client releases lock.
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*
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* PCC Writes:
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* * Client tries to acquire channel lock.
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* * Client writes to its communication region after it acquires a
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* channel lock.
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* * Client writes WRITE cmd in communication region cmd address.
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* * Client issues mbox_send_message() which rings the PCC doorbell
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* for its PCC channel.
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* * If command completes, then writes have succeeded and it can release
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* the channel lock.
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*
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* There is a Nominal latency defined for each channel which indicates
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* how long to wait until a command completes. If command is not complete
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* the client needs to retry or assume failure.
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*
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* For more details about PCC, please see the ACPI specification from
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* http://www.uefi.org/ACPIv5.1 Section 14.
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*
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* This file implements PCC as a Mailbox controller and allows for PCC
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* clients to be implemented as its Mailbox Client Channels.
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*/
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#include <linux/acpi.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/log2.h>
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#include <linux/platform_device.h>
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#include <linux/mailbox_controller.h>
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#include <linux/mailbox_client.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <acpi/pcc.h>
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#include "mailbox.h"
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#define MBOX_IRQ_NAME "pcc-mbox"
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/**
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* struct pcc_chan_reg - PCC register bundle
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*
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* @vaddr: cached virtual address for this register
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* @gas: pointer to the generic address structure for this register
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* @preserve_mask: bitmask to preserve when writing to this register
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* @set_mask: bitmask to set when writing to this register
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* @status_mask: bitmask to determine and/or update the status for this register
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*/
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struct pcc_chan_reg {
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void __iomem *vaddr;
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struct acpi_generic_address *gas;
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u64 preserve_mask;
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u64 set_mask;
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u64 status_mask;
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};
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/**
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* struct pcc_chan_info - PCC channel specific information
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*
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* @chan: PCC channel information with Shared Memory Region info
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* @db: PCC register bundle for the doorbell register
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* @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge
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* register
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* @cmd_complete: PCC register bundle for the command complete check register
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* @cmd_update: PCC register bundle for the command complete update register
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* @error: PCC register bundle for the error status register
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* @plat_irq: platform interrupt
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*/
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struct pcc_chan_info {
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struct pcc_mbox_chan chan;
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struct pcc_chan_reg db;
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struct pcc_chan_reg plat_irq_ack;
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struct pcc_chan_reg cmd_complete;
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struct pcc_chan_reg cmd_update;
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struct pcc_chan_reg error;
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int plat_irq;
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};
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#define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan)
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static struct pcc_chan_info *chan_info;
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static int pcc_chan_count;
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/*
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* PCC can be used with perf critical drivers such as CPPC
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* So it makes sense to locally cache the virtual address and
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* use it to read/write to PCC registers such as doorbell register
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*
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* The below read_register and write_registers are used to read and
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* write from perf critical registers such as PCC doorbell register
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*/
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static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
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{
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switch (bit_width) {
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case 8:
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*val = readb(vaddr);
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break;
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case 16:
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*val = readw(vaddr);
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break;
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case 32:
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*val = readl(vaddr);
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break;
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case 64:
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*val = readq(vaddr);
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break;
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}
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}
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static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
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{
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switch (bit_width) {
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case 8:
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writeb(val, vaddr);
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break;
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case 16:
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writew(val, vaddr);
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break;
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case 32:
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writel(val, vaddr);
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break;
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case 64:
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writeq(val, vaddr);
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break;
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}
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}
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static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
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{
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int ret = 0;
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if (!reg->gas) {
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*val = 0;
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return 0;
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}
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if (reg->vaddr)
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read_register(reg->vaddr, val, reg->gas->bit_width);
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else
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ret = acpi_read(val, reg->gas);
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return ret;
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}
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static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
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{
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int ret = 0;
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if (!reg->gas)
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return 0;
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if (reg->vaddr)
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write_register(reg->vaddr, val, reg->gas->bit_width);
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else
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ret = acpi_write(val, reg->gas);
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return ret;
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}
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static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg)
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{
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int ret = 0;
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u64 val;
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ret = pcc_chan_reg_read(reg, &val);
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if (ret)
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return ret;
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val &= reg->preserve_mask;
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val |= reg->set_mask;
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return pcc_chan_reg_write(reg, val);
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}
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/**
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* pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number
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* @interrupt: GSI number.
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* @flags: interrupt flags
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*
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* Returns: a valid linux IRQ number on success
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* 0 or -EINVAL on failure
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*/
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static int pcc_map_interrupt(u32 interrupt, u32 flags)
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{
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int trigger, polarity;
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if (!interrupt)
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return 0;
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trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
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: ACPI_LEVEL_SENSITIVE;
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polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
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: ACPI_ACTIVE_HIGH;
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return acpi_register_gsi(NULL, interrupt, trigger, polarity);
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}
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/**
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* pcc_mbox_irq - PCC mailbox interrupt handler
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* @irq: interrupt number
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* @p: data/cookie passed from the caller to identify the channel
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*
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* Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not
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*/
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static irqreturn_t pcc_mbox_irq(int irq, void *p)
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{
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struct pcc_chan_info *pchan;
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struct mbox_chan *chan = p;
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u64 val;
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int ret;
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pchan = chan->con_priv;
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ret = pcc_chan_reg_read(&pchan->cmd_complete, &val);
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if (ret)
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return IRQ_NONE;
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if (val) { /* Ensure GAS exists and value is non-zero */
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val &= pchan->cmd_complete.status_mask;
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if (!val)
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return IRQ_NONE;
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}
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ret = pcc_chan_reg_read(&pchan->error, &val);
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if (ret)
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return IRQ_NONE;
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val &= pchan->error.status_mask;
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if (val) {
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val &= ~pchan->error.status_mask;
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pcc_chan_reg_write(&pchan->error, val);
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return IRQ_NONE;
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}
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if (pcc_chan_reg_read_modify_write(&pchan->plat_irq_ack))
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return IRQ_NONE;
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mbox_chan_received_data(chan, NULL);
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return IRQ_HANDLED;
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}
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/**
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* pcc_mbox_request_channel - PCC clients call this function to
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* request a pointer to their PCC subspace, from which they
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* can get the details of communicating with the remote.
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* @cl: Pointer to Mailbox client, so we know where to bind the
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* Channel.
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* @subspace_id: The PCC Subspace index as parsed in the PCC client
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* ACPI package. This is used to lookup the array of PCC
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* subspaces as parsed by the PCC Mailbox controller.
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*
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* Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR.
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*/
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struct pcc_mbox_chan *
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pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id)
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{
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struct pcc_chan_info *pchan;
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struct mbox_chan *chan;
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struct device *dev;
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unsigned long flags;
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if (subspace_id < 0 || subspace_id >= pcc_chan_count)
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return ERR_PTR(-ENOENT);
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pchan = chan_info + subspace_id;
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chan = pchan->chan.mchan;
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if (IS_ERR(chan) || chan->cl) {
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pr_err("Channel not found for idx: %d\n", subspace_id);
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return ERR_PTR(-EBUSY);
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}
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dev = chan->mbox->dev;
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spin_lock_irqsave(&chan->lock, flags);
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chan->msg_free = 0;
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chan->msg_count = 0;
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chan->active_req = NULL;
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chan->cl = cl;
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init_completion(&chan->tx_complete);
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if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone)
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chan->txdone_method = TXDONE_BY_ACK;
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spin_unlock_irqrestore(&chan->lock, flags);
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if (pchan->plat_irq > 0) {
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int rc;
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rc = devm_request_irq(dev, pchan->plat_irq, pcc_mbox_irq, 0,
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MBOX_IRQ_NAME, chan);
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if (unlikely(rc)) {
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dev_err(dev, "failed to register PCC interrupt %d\n",
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pchan->plat_irq);
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pcc_mbox_free_channel(&pchan->chan);
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return ERR_PTR(rc);
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}
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}
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return &pchan->chan;
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}
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EXPORT_SYMBOL_GPL(pcc_mbox_request_channel);
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/**
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* pcc_mbox_free_channel - Clients call this to free their Channel.
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*
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* @pchan: Pointer to the PCC mailbox channel as returned by
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* pcc_mbox_request_channel()
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*/
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void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan)
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{
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struct pcc_chan_info *pchan_info = to_pcc_chan_info(pchan);
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struct mbox_chan *chan = pchan->mchan;
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unsigned long flags;
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if (!chan || !chan->cl)
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return;
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if (pchan_info->plat_irq > 0)
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devm_free_irq(chan->mbox->dev, pchan_info->plat_irq, chan);
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spin_lock_irqsave(&chan->lock, flags);
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chan->cl = NULL;
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chan->active_req = NULL;
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if (chan->txdone_method == TXDONE_BY_ACK)
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chan->txdone_method = TXDONE_BY_POLL;
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spin_unlock_irqrestore(&chan->lock, flags);
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}
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EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
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/**
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* pcc_send_data - Called from Mailbox Controller code. Used
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* here only to ring the channel doorbell. The PCC client
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* specific read/write is done in the client driver in
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* order to maintain atomicity over PCC channel once
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* OS has control over it. See above for flow of operations.
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* @chan: Pointer to Mailbox channel over which to send data.
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* @data: Client specific data written over channel. Used here
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* only for debug after PCC transaction completes.
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*
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* Return: Err if something failed else 0 for success.
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*/
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static int pcc_send_data(struct mbox_chan *chan, void *data)
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{
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int ret;
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struct pcc_chan_info *pchan = chan->con_priv;
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ret = pcc_chan_reg_read_modify_write(&pchan->cmd_update);
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if (ret)
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return ret;
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return pcc_chan_reg_read_modify_write(&pchan->db);
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}
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static const struct mbox_chan_ops pcc_chan_ops = {
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.send_data = pcc_send_data,
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};
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/**
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* parse_pcc_subspace - Count PCC subspaces defined
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* @header: Pointer to the ACPI subtable header under the PCCT.
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* @end: End of subtable entry.
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*
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* Return: If we find a PCC subspace entry of a valid type, return 0.
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* Otherwise, return -EINVAL.
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*
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* This gets called for each entry in the PCC table.
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*/
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static int parse_pcc_subspace(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header;
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if (ss->header.type < ACPI_PCCT_TYPE_RESERVED)
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return 0;
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return -EINVAL;
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}
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static int
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pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas,
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u64 preserve_mask, u64 set_mask, u64 status_mask, char *name)
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{
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if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
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if (!(gas->bit_width >= 8 && gas->bit_width <= 64 &&
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is_power_of_2(gas->bit_width))) {
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pr_err("Error: Cannot access register of %u bit width",
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gas->bit_width);
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return -EFAULT;
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}
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reg->vaddr = acpi_os_ioremap(gas->address, gas->bit_width / 8);
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if (!reg->vaddr) {
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pr_err("Failed to ioremap PCC %s register\n", name);
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return -ENOMEM;
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}
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}
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reg->gas = gas;
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reg->preserve_mask = preserve_mask;
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reg->set_mask = set_mask;
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reg->status_mask = status_mask;
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return 0;
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}
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/**
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* pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register
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*
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* @pchan: Pointer to the PCC channel info structure.
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* @pcct_entry: Pointer to the ACPI subtable header.
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*
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* Return: 0 for Success, else errno.
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*
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* There should be one entry per PCC channel. This gets called for each
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* entry in the PCC table. This uses PCCY Type1 structure for all applicable
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* types(Type 1-4) to fetch irq
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*/
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static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan,
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struct acpi_subtable_header *pcct_entry)
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{
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int ret = 0;
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struct acpi_pcct_hw_reduced *pcct_ss;
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if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE ||
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pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
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return 0;
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pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
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pchan->plat_irq = pcc_map_interrupt(pcct_ss->platform_interrupt,
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(u32)pcct_ss->flags);
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if (pchan->plat_irq <= 0) {
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pr_err("PCC GSI %d not registered\n",
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pcct_ss->platform_interrupt);
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return -EINVAL;
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}
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if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
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struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss;
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ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
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&pcct2_ss->platform_ack_register,
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pcct2_ss->ack_preserve_mask,
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pcct2_ss->ack_write_mask, 0,
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"PLAT IRQ ACK");
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} else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE ||
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pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) {
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|
struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss;
|
|
|
|
ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
|
|
&pcct_ext->platform_ack_register,
|
|
pcct_ext->ack_preserve_mask,
|
|
pcct_ext->ack_set_mask, 0,
|
|
"PLAT IRQ ACK");
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* pcc_parse_subspace_db_reg - Parse the PCC doorbell register
|
|
*
|
|
* @pchan: Pointer to the PCC channel info structure.
|
|
* @pcct_entry: Pointer to the ACPI subtable header.
|
|
*
|
|
* Return: 0 for Success, else errno.
|
|
*/
|
|
static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan,
|
|
struct acpi_subtable_header *pcct_entry)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
|
|
struct acpi_pcct_subspace *pcct_ss;
|
|
|
|
pcct_ss = (struct acpi_pcct_subspace *)pcct_entry;
|
|
|
|
ret = pcc_chan_reg_init(&pchan->db,
|
|
&pcct_ss->doorbell_register,
|
|
pcct_ss->preserve_mask,
|
|
pcct_ss->write_mask, 0, "Doorbell");
|
|
|
|
} else {
|
|
struct acpi_pcct_ext_pcc_master *pcct_ext;
|
|
|
|
pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry;
|
|
|
|
ret = pcc_chan_reg_init(&pchan->db,
|
|
&pcct_ext->doorbell_register,
|
|
pcct_ext->preserve_mask,
|
|
pcct_ext->write_mask, 0, "Doorbell");
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pcc_chan_reg_init(&pchan->cmd_complete,
|
|
&pcct_ext->cmd_complete_register,
|
|
0, 0, pcct_ext->cmd_complete_mask,
|
|
"Command Complete Check");
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pcc_chan_reg_init(&pchan->cmd_update,
|
|
&pcct_ext->cmd_update_register,
|
|
pcct_ext->cmd_update_preserve_mask,
|
|
pcct_ext->cmd_update_set_mask, 0,
|
|
"Command Complete Update");
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = pcc_chan_reg_init(&pchan->error,
|
|
&pcct_ext->error_status_register,
|
|
0, 0, pcct_ext->error_status_mask,
|
|
"Error Status");
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information
|
|
*
|
|
* @pchan: Pointer to the PCC channel info structure.
|
|
* @pcct_entry: Pointer to the ACPI subtable header.
|
|
*
|
|
*/
|
|
static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan,
|
|
struct acpi_subtable_header *pcct_entry)
|
|
{
|
|
if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
|
|
struct acpi_pcct_subspace *pcct_ss =
|
|
(struct acpi_pcct_subspace *)pcct_entry;
|
|
|
|
pchan->chan.shmem_base_addr = pcct_ss->base_address;
|
|
pchan->chan.shmem_size = pcct_ss->length;
|
|
pchan->chan.latency = pcct_ss->latency;
|
|
pchan->chan.max_access_rate = pcct_ss->max_access_rate;
|
|
pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time;
|
|
} else {
|
|
struct acpi_pcct_ext_pcc_master *pcct_ext =
|
|
(struct acpi_pcct_ext_pcc_master *)pcct_entry;
|
|
|
|
pchan->chan.shmem_base_addr = pcct_ext->base_address;
|
|
pchan->chan.shmem_size = pcct_ext->length;
|
|
pchan->chan.latency = pcct_ext->latency;
|
|
pchan->chan.max_access_rate = pcct_ext->max_access_rate;
|
|
pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* acpi_pcc_probe - Parse the ACPI tree for the PCCT.
|
|
*
|
|
* Return: 0 for Success, else errno.
|
|
*/
|
|
static int __init acpi_pcc_probe(void)
|
|
{
|
|
int count, i, rc = 0;
|
|
acpi_status status;
|
|
struct acpi_table_header *pcct_tbl;
|
|
struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED];
|
|
|
|
status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
|
|
if (ACPI_FAILURE(status) || !pcct_tbl)
|
|
return -ENODEV;
|
|
|
|
/* Set up the subtable handlers */
|
|
for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE;
|
|
i < ACPI_PCCT_TYPE_RESERVED; i++) {
|
|
proc[i].id = i;
|
|
proc[i].count = 0;
|
|
proc[i].handler = parse_pcc_subspace;
|
|
}
|
|
|
|
count = acpi_table_parse_entries_array(ACPI_SIG_PCCT,
|
|
sizeof(struct acpi_table_pcct), proc,
|
|
ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES);
|
|
if (count <= 0 || count > MAX_PCC_SUBSPACES) {
|
|
if (count < 0)
|
|
pr_warn("Error parsing PCC subspaces from PCCT\n");
|
|
else
|
|
pr_warn("Invalid PCCT: %d PCC subspaces\n", count);
|
|
|
|
rc = -EINVAL;
|
|
} else {
|
|
pcc_chan_count = count;
|
|
}
|
|
|
|
acpi_put_table(pcct_tbl);
|
|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* pcc_mbox_probe - Called when we find a match for the
|
|
* PCCT platform device. This is purely used to represent
|
|
* the PCCT as a virtual device for registering with the
|
|
* generic Mailbox framework.
|
|
*
|
|
* @pdev: Pointer to platform device returned when a match
|
|
* is found.
|
|
*
|
|
* Return: 0 for Success, else errno.
|
|
*/
|
|
static int pcc_mbox_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct mbox_controller *pcc_mbox_ctrl;
|
|
struct mbox_chan *pcc_mbox_channels;
|
|
struct acpi_table_header *pcct_tbl;
|
|
struct acpi_subtable_header *pcct_entry;
|
|
struct acpi_table_pcct *acpi_pcct_tbl;
|
|
acpi_status status = AE_OK;
|
|
int i, rc, count = pcc_chan_count;
|
|
|
|
/* Search for PCCT */
|
|
status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
|
|
|
|
if (ACPI_FAILURE(status) || !pcct_tbl)
|
|
return -ENODEV;
|
|
|
|
pcc_mbox_channels = devm_kcalloc(dev, count, sizeof(*pcc_mbox_channels),
|
|
GFP_KERNEL);
|
|
if (!pcc_mbox_channels) {
|
|
rc = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
chan_info = devm_kcalloc(dev, count, sizeof(*chan_info), GFP_KERNEL);
|
|
if (!chan_info) {
|
|
rc = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
pcc_mbox_ctrl = devm_kmalloc(dev, sizeof(*pcc_mbox_ctrl), GFP_KERNEL);
|
|
if (!pcc_mbox_ctrl) {
|
|
rc = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
/* Point to the first PCC subspace entry */
|
|
pcct_entry = (struct acpi_subtable_header *) (
|
|
(unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct));
|
|
|
|
acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl;
|
|
if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL)
|
|
pcc_mbox_ctrl->txdone_irq = true;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
struct pcc_chan_info *pchan = chan_info + i;
|
|
|
|
pcc_mbox_channels[i].con_priv = pchan;
|
|
pchan->chan.mchan = &pcc_mbox_channels[i];
|
|
|
|
if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE &&
|
|
!pcc_mbox_ctrl->txdone_irq) {
|
|
pr_err("Plaform Interrupt flag must be set to 1");
|
|
rc = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
if (pcc_mbox_ctrl->txdone_irq) {
|
|
rc = pcc_parse_subspace_irq(pchan, pcct_entry);
|
|
if (rc < 0)
|
|
goto err;
|
|
}
|
|
rc = pcc_parse_subspace_db_reg(pchan, pcct_entry);
|
|
if (rc < 0)
|
|
goto err;
|
|
|
|
pcc_parse_subspace_shmem(pchan, pcct_entry);
|
|
|
|
pcct_entry = (struct acpi_subtable_header *)
|
|
((unsigned long) pcct_entry + pcct_entry->length);
|
|
}
|
|
|
|
pcc_mbox_ctrl->num_chans = count;
|
|
|
|
pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl->num_chans);
|
|
|
|
pcc_mbox_ctrl->chans = pcc_mbox_channels;
|
|
pcc_mbox_ctrl->ops = &pcc_chan_ops;
|
|
pcc_mbox_ctrl->dev = dev;
|
|
|
|
pr_info("Registering PCC driver as Mailbox controller\n");
|
|
rc = mbox_controller_register(pcc_mbox_ctrl);
|
|
if (rc)
|
|
pr_err("Err registering PCC as Mailbox controller: %d\n", rc);
|
|
else
|
|
return 0;
|
|
err:
|
|
acpi_put_table(pcct_tbl);
|
|
return rc;
|
|
}
|
|
|
|
static struct platform_driver pcc_mbox_driver = {
|
|
.probe = pcc_mbox_probe,
|
|
.driver = {
|
|
.name = "PCCT",
|
|
},
|
|
};
|
|
|
|
static int __init pcc_init(void)
|
|
{
|
|
int ret;
|
|
struct platform_device *pcc_pdev;
|
|
|
|
if (acpi_disabled)
|
|
return -ENODEV;
|
|
|
|
/* Check if PCC support is available. */
|
|
ret = acpi_pcc_probe();
|
|
|
|
if (ret) {
|
|
pr_debug("ACPI PCC probe failed.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
pcc_pdev = platform_create_bundle(&pcc_mbox_driver,
|
|
pcc_mbox_probe, NULL, 0, NULL, 0);
|
|
|
|
if (IS_ERR(pcc_pdev)) {
|
|
pr_debug("Err creating PCC platform bundle\n");
|
|
return PTR_ERR(pcc_pdev);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Make PCC init postcore so that users of this mailbox
|
|
* such as the ACPI Processor driver have it available
|
|
* at their init.
|
|
*/
|
|
postcore_initcall(pcc_init);
|