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![Sunil Muthuswamy](/assets/img/avatar_default.png)
Add arm64 Hyper-V vPCI support by implementing the arch specific interfaces. Introduce an IRQ domain and chip specific to Hyper-v vPCI that is based on SPIs. The IRQ domain parents itself to the arch GIC IRQ domain for basic vector management. [bhelgaas: squash in fix from Yang Li <yang.lee@linux.alibaba.com>: https://lore.kernel.org/r/20220112003324.62755-1-yang.lee@linux.alibaba.com] Link: https://lore.kernel.org/r/1641411156-31705-3-git-send-email-sunilmut@linux.microsoft.com Signed-off-by: Sunil Muthuswamy <sunilmut@microsoft.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Michael Kelley <mikelley@microsoft.com>
260 lines
7.1 KiB
Text
260 lines
7.1 KiB
Text
# SPDX-License-Identifier: GPL-2.0
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#
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# PCI configuration
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#
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# select this to offer the PCI prompt
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config HAVE_PCI
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bool
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# select this to unconditionally force on PCI support
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config FORCE_PCI
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bool
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select HAVE_PCI
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select PCI
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menuconfig PCI
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bool "PCI support"
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depends on HAVE_PCI
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help
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This option enables support for the PCI local bus, including
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support for PCI-X and the foundations for PCI Express support.
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Say 'Y' here unless you know what you are doing.
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if PCI
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config PCI_DOMAINS
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bool
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depends on PCI
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config PCI_DOMAINS_GENERIC
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bool
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select PCI_DOMAINS
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config PCI_SYSCALL
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bool
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source "drivers/pci/pcie/Kconfig"
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config PCI_MSI
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bool "Message Signaled Interrupts (MSI and MSI-X)"
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select GENERIC_MSI_IRQ
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help
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This allows device drivers to enable MSI (Message Signaled
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Interrupts). Message Signaled Interrupts enable a device to
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generate an interrupt using an inbound Memory Write on its
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PCI bus instead of asserting a device IRQ pin.
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Use of PCI MSI interrupts can be disabled at kernel boot time
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by using the 'pci=nomsi' option. This disables MSI for the
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entire system.
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If you don't know what to do here, say Y.
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config PCI_MSI_IRQ_DOMAIN
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def_bool y
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depends on PCI_MSI
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select GENERIC_MSI_IRQ_DOMAIN
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config PCI_MSI_ARCH_FALLBACKS
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bool
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config PCI_QUIRKS
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default y
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bool "Enable PCI quirk workarounds" if EXPERT
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help
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This enables workarounds for various PCI chipset bugs/quirks.
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Disable this only if your target machine is unaffected by PCI
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quirks.
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config PCI_DEBUG
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bool "PCI Debugging"
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depends on DEBUG_KERNEL
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help
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Say Y here if you want the PCI core to produce a bunch of debug
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messages to the system log. Select this if you are having a
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problem with PCI support and want to see more of what is going on.
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When in doubt, say N.
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config PCI_REALLOC_ENABLE_AUTO
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bool "Enable PCI resource re-allocation detection"
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depends on PCI_IOV
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help
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Say Y here if you want the PCI core to detect if PCI resource
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re-allocation needs to be enabled. You can always use pci=realloc=on
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or pci=realloc=off to override it. It will automatically
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re-allocate PCI resources if SR-IOV BARs have not been allocated by
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the BIOS.
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When in doubt, say N.
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config PCI_STUB
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tristate "PCI Stub driver"
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help
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Say Y or M here if you want be able to reserve a PCI device
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when it is going to be assigned to a guest operating system.
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When in doubt, say N.
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config PCI_PF_STUB
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tristate "PCI PF Stub driver"
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depends on PCI_IOV
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help
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Say Y or M here if you want to enable support for devices that
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require SR-IOV support, while at the same time the PF (Physical
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Function) itself is not providing any actual services on the
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host itself such as storage or networking.
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When in doubt, say N.
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config XEN_PCIDEV_FRONTEND
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tristate "Xen PCI Frontend"
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depends on XEN_PV
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select PCI_XEN
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select XEN_XENBUS_FRONTEND
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default y
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help
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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config PCI_ATS
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bool
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config PCI_ECAM
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bool
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config PCI_LOCKLESS_CONFIG
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bool
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config PCI_BRIDGE_EMUL
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bool
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config PCI_IOV
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bool "PCI IOV support"
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select PCI_ATS
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help
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I/O Virtualization is a PCI feature supported by some devices
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which allows them to create virtual devices which share their
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physical resources.
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If unsure, say N.
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config PCI_PRI
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bool "PCI PRI support"
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select PCI_ATS
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help
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PRI is the PCI Page Request Interface. It allows PCI devices that are
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behind an IOMMU to recover from page faults.
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If unsure, say N.
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config PCI_PASID
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bool "PCI PASID support"
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select PCI_ATS
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help
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Process Address Space Identifiers (PASIDs) can be used by PCI devices
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to access more than one IO address space at the same time. To make
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use of this feature an IOMMU is required which also supports PASIDs.
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Select this option if you have such an IOMMU and want to compile the
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driver for it into your kernel.
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If unsure, say N.
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config PCI_P2PDMA
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bool "PCI peer-to-peer transfer support"
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depends on ZONE_DEVICE
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select GENERIC_ALLOCATOR
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help
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Enableѕ drivers to do PCI peer-to-peer transactions to and from
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BARs that are exposed in other devices that are the part of
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the hierarchy where peer-to-peer DMA is guaranteed by the PCI
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specification to work (ie. anything below a single PCI bridge).
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Many PCIe root complexes do not support P2P transactions and
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it's hard to tell which support it at all, so at this time,
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P2P DMA transactions must be between devices behind the same root
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port.
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If unsure, say N.
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config PCI_LABEL
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def_bool y if (DMI || ACPI)
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select NLS
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config PCI_HYPERV
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tristate "Hyper-V PCI Frontend"
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depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && SYSFS
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select PCI_HYPERV_INTERFACE
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help
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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choice
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prompt "PCI Express hierarchy optimization setting"
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default PCIE_BUS_DEFAULT
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depends on PCI && EXPERT
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help
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MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
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device parameters that affect performance and the ability to
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support hotplug and peer-to-peer DMA.
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The following choices set the MPS and MRRS optimization strategy
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at compile-time. The choices are the same as those offered for
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the kernel command-line parameter 'pci', i.e.,
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'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
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'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
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This is a compile-time setting and can be overridden by the above
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command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
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config PCIE_BUS_TUNE_OFF
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bool "Tune Off"
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depends on PCI
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help
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Use the BIOS defaults; don't touch MPS at all. This is the same
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as booting with 'pci=pcie_bus_tune_off'.
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config PCIE_BUS_DEFAULT
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bool "Default"
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depends on PCI
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help
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Default choice; ensure that the MPS matches upstream bridge.
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config PCIE_BUS_SAFE
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bool "Safe"
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depends on PCI
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help
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Use largest MPS that boot-time devices support. If you have a
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closed system with no possibility of adding new devices, this
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will use the largest MPS that's supported by all devices. This
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is the same as booting with 'pci=pcie_bus_safe'.
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config PCIE_BUS_PERFORMANCE
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bool "Performance"
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depends on PCI
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help
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Use MPS and MRRS for best performance. Ensure that a given
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device's MPS is no larger than its parent MPS, which allows us to
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keep all switches/bridges to the max MPS supported by their
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parent. This is the same as booting with 'pci=pcie_bus_perf'.
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config PCIE_BUS_PEER2PEER
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bool "Peer2peer"
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depends on PCI
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help
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Set MPS = 128 for all devices. MPS configuration effected by the
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other options could cause the MPS on one root port to be
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different than that of the MPS on another, which may cause
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hot-added devices or peer-to-peer DMA to fail. Set MPS to the
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smallest possible value (128B) system-wide to avoid these issues.
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This is the same as booting with 'pci=pcie_bus_peer2peer'.
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endchoice
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source "drivers/pci/hotplug/Kconfig"
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source "drivers/pci/controller/Kconfig"
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source "drivers/pci/endpoint/Kconfig"
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source "drivers/pci/switch/Kconfig"
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endif
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